Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
dsPIC33/PIC24 Family Reference Manual
DS70000195F-page 48 2007-2014 Microchip Technology Inc.
7.3.9 STRICT SUPPORT
The slave module Acknowledges all the addresses, including the reserved addresses, when
STRICT reserved addressing is not enforced (STRICT = 0). The slave device does not
Acknowledge the reserved address space if the STRICT bit (I2CxCONL<11>) is set.
Table 7-1: Slave Response to Reserved Addresses
7.3.10 WHEN AN ADDRESS IS INVALID
If a 7-bit address does not match the contents of the I2CxADD<6:0> bits, the slave will return to
an Idle state and ignore any activity on the I
2
C bus until after the Stop condition.
If the first byte of a 10-bit address does not match the contents of the I2CxADD<9:8> bits, the
slave will return to an Idle state and ignore all bus activity until after the Stop condition.
If the first byte of a 10-bit address matches the contents of the I2CxADD<9:8> bits, but the
second byte of the 10-bit address does not match the I2CxADD<7:0> bits, the slave will return
to an Idle state and ignore all bus activity until after the Stop condition.
STRICT Bit
I2CxADD
Slave Address
Received Address
into I2CxRSR
Slave Acknowledge
x 0x1F 0x1F ACK
1 0x1F Cbus Address NACK
1 Cbus Address Cbus Address NACK
0 Cbus Address Cbus Address ACK
0 Cbus Address 0x1F NACK
0 0x1F Cbus Address NACK
Note:
When the STRICT bit is cleared, the ACK signal is generated, only if the address is
matched, even for reserved addresses. The slave device does not generate an ACK
if there is an address mismatch, even if the address is a reserved address. Irrespec-
tive of the STRICT bit setting, and the address is reserved or not, an ACK
signal is
generated for a proper address match.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-PIC24FJ32MC102-I2C.pdf