Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
1.2.3.4.22 DRV_UART4_TransferStatus Function 66
1.2.3.4.23 DRV_UART4_TXBufferIsFull Function 66
1.2.3.4.24 DRV_UART4_TXBufferSizeGet Function 67
1.3 SPI Driver 68
1.3.1 Using Driver 68
1.3.1.1 Abstraction Model 69
1.3.2 Configuring the Driver 70
1.3.2.1 DRV_SPI_CONFIG_CHANNEL_1_ENABLE Macro 70
1.3.2.2 DRV_SPI_CONFIG_CHANNEL_2_ENABLE Macro 70
1.3.2.3 DRV_SPI_CONFIG_CHANNEL_3_ENABLE Macro 71
1.3.2.4 DRV_SPI_CONFIG_CHANNEL_4_ENABLE Macro 71
1.3.2.5 DRV_SPI_CONFIG_ENHANCED_BUFFER_DISABLE Macro 71
1.3.3 Driver Interface 71
1.3.3.1 Initialization and Setup Functions 71
1.3.3.1.1 DRV_SPI_Deinitialize Function 72
1.3.3.1.2 DRV_SPI_Initialize Function 72
1.3.3.1.3 DRV_SPI_Lock Function 73
1.3.3.1.4 DRV_SPI_Unlock Function 74
1.3.3.2 Data Transfer Functions 74
1.3.3.2.1 DRV_SPI_Get Function 75
1.3.3.2.2 DRV_SPI_GetBuffer Function 75
1.3.3.2.3 DRV_SPI_Put Function 76
1.3.3.2.4 DRV_SPI_PutBuffer Function 77
1.3.3.3 Data Types and Constants 78
1.3.3.3.1 DRV_SPI_INIT_DATA Structure 78
1.3.3.3.2 SPI_BUS_MODES Enumeration 78
Index 80
MLA - Drivers Help
5
Protego_Release_01_05-Related-OEM-Documentation-MLA_v2013_12_20-help_mla_driver.pdf