Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
PIC24F Family Reference Manual
DS39715A-page 4-12 Advance Information © 2007 Microchip Technology Inc.
In Example 4-1 and Example 4-2, the post-increment operator on the read of the low byte causes
the address in the working register to increment by one. This sets EA<0> to ‘1’ for access to the
middle byte in the third write instruction. The last post-increment sets W0 back to an even
address, pointing to the next program memory location.
4.6.2 Using Table Write Instructions
4.6.2.1 TABLE WRITE HOLDING LATCHES
Table write instructions do not write directly to the nonvolatile program. Instead, the table write
instructions load holding latches that store the write data. The holding latches are not memory
mapped and can only be accessed using table write instructions. When all of the holding latches
have been loaded, the actual memory programming operation is started by executing a special
sequence of instructions.
Please refer to the specific device data sheet for further details.
4.6.2.2 WRITING A SINGLE PROGRAM MEMORY LATCH IN WORD/BYTE MODE
The following sequence can be used to write a single program memory latch location in Word
mode:
Example 4-3: Write Word Mode
In this example, the contents of the upper byte of W3 does not matter because this data will be
written to the phantom byte location. W0 is post-incremented by 2, after the second TBLWTH
instruction, to prepare for the write to the next program memory location.
Note: The tblpage() and tbloffset() directives are provided by the Microchip
assembler for the PIC24F. These directives select the appropriate TBLPAG and W
register values for the table instruction from a program memory address value.
Refer to
“MPLAB
®
ASM 30, MPLAB
®
LINK30 and Utilities User’s Guide”
(DS51317)
for further details.
; Setup the address pointer to program space
MOV #tblpage(PROG_ADDR),W0 ; get table page value
MOV W0,TBLPAG ; load TBLPAG register
MOV #tbloffset(PROG_ADDR),W0 ; load address LS word
; Load write data into W registers
MOV #PROG_LOW_WORD,W2
MOV #PROG_HI_BYTE,W3
; Perform the table writes to load the latch
TBLWTL W2
,
[W0]
TBLWTH W3
,
[W0++]
Equivalent C Code
int VarWord1 = 0xXXXX;
int VarWord2 = 0xXXXX;
int addrOffset;
{
:
:
TBLPAG = ((PROG_ADDR & 0x7F0000)>>16);
addrOffset = (PROG_ADDR & 0x00FFFF);
asm("tblwtl %1, [%0]" : "=r"(addrOffset) : "d"(VarWord)) ;
asm("tblwth %1, [%0]" : "=r"(addrOffset) : "d"(VarWord1)) ;
:
:
}
Note: Save all the working registers prior to using them.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-Section4-Program_Memory.pdf