Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 132 © 2005-2011 Microchip Technology Inc.
BRA GE
Branch if Signed Greater Than or Equal
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} BRA GE, Expr
Operands: Expr may be a label, absolute address or expression.
Expr is resolved by the linker to a Slit16, where
Slit16 [-32768 ... +32767].
Operation: Condition = (N&&OV)||(!N&&!OV)
If (Condition)
(PC + 2) + 2 * Slit16 PC
NOP Instruction Register
Status Affected: None
Encoding: 0011 1101 nnnn nnnn nnnn nnnn
Description: If the logical expression (N&&OV)||(!N&&!OV) is true, then the program
will branch relative to the next PC. The offset of the branch is the two’s
complement number ‘2 * Slit16’, which supports branches up to 32K
instructions forward or backward. The Slit16 value is resolved by the
linker from the supplied label, absolute address or expression.
If the branch is taken, the new address will be (PC + 2) + 2 * Slit16, since
the PC will have incremented to fetch the next instruction. The instruction
then becomes a two-cycle instruction, with a NOP executed in the second
cycle.
The ‘n’ bits are a 16-bit signed literal that specify the offset from (PC + 2)
in instruction words.
Note: The assembler will convert the specified label into the offset to
be used.
Words: 1
Cycles: 1 (2 if branch taken) – PIC24F, PIC24H, dsPIC30F, dsPIC33F
1 (4 if branch taken) – PIC24E, dsPIC33E
Example 1:
007600 LOOP: . . .
007602 . . .
007604 . . .
007606 . . .
007608 HERE: BRA GE, LOOP
00760A NO_GE: . . .
; If GE, branch to LOOP
; Otherwise... continue
Before
Instruction
After
Instruction
PC 00 7608 PC 00 7600
SR 0000 SR 0000

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