Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

PIC24F Family Reference Manual
DS39737A-page 49-24 Preliminary © 2010 Microchip Technology Inc.
49.4.7 Enabling the ADC Module
When the ADON bit (ADxCON1<15>) is 1’, the module is in active mode and is fully powered
and functional.
When ADON is 0’, the module is disabled. The digital and analog portions of the circuit are
turned off for maximum current savings.
To return to the active mode from the off mode, the user application must wait for the analog
stages to stabilize. For the stabilization time, refer to the “Electrical Characteristics” chapter
of the specific device data sheet.
49.4.8 Turning the ADC Module Off
Clearing the ADON bit disables the ADC module (stops any scanning, sampling and conversion
processes). In this state, the ADC module still consumes some current. Setting the ADxMD bit in
the PMD register will disable the ADC module and will stop the ADC clock source, which reduces
device current consumption. Note that setting the ADxMD bit, and then clearing the bit, will reset
the ADC module registers to their default state. Additionally, any digital pins that share their
function with an ADC input pin revert to the analog function. While the ADxMD bit is set, these
pins will be set to digital function. In this case, the ADxPCFG bits will not have any effect.
Note: The SSRC<2:0>, SIMSAM, ASAM, CHPS<1:0>, SMPI<3:0>, BUFM and ALTS bits,
as well as the ADCON3 and ADCSSL registers, should not be written to while
ADON = 1. This would lead to indeterminate results.
Note: Clearing the ADON bit during a conversion will abort the current A/D conversion.
The ADC buffer will not be updated with the partially completed conversion sample.

e-Highlighter

Click to send permalink to address bar, or right-click to copy permalink.

Un-highlight all Un-highlight selectionu Highlight selectionh