Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
2007-2014 Microchip Technology Inc. DS70000195F-page 19
Inter-Integrated Circuit™ (I
2
C™)
4.3 Setting Baud Rate When Operating as a Bus Master
When operating as an I
2
C master, the module must generate the system SCLx clock. Generally,
the I
2
C system clocks are specified to be either 100 kHz, 400 kHz or 1 MHz. The system clock
rate is specified as the minimum SCLx low time, plus the minimum SCLx high time. In most
cases, that is defined by two BRG periods (TBRG).
The reload value for the BRG is the I2CxBRG register, as illustrated in Figure 4-1. When the BRG
is loaded with this value, the generator counts down to zero and stops until another reload has
taken place. The BRG is reloaded automatically on baud rate restart. For example, if clock
synchronization is taking place, the BRG will be reloaded when the SCLx pin is sampled high.
Equation 4-1 shows the formula for computing the BRG reload value.
Equation 4-1: BRG Reload Value Calculation
Figure 4-1: Baud Rate Generator Block Diagram
Note: The I2CxBRG register values that are less than two are not supported.
Note: Equation 4-1 is only for a design guideline. Due to system-dependent parameters,
the actual baud rate may differ slightly. Testing is required to confirm that the actual
baud rate meets the system requirements. Otherwise, the value of the I2CxBRG
register has to be adjusted.
I2CxBRG
1
FSCL
--------------- Delay–
FCY
2
-----------
2–=
I2CxBRG
1
FSCL
--------------- Delay–
Fcy
2. Default –=
See Note 1
See Note 1 and Note 2
Where:
Typical value of delay varies from 110 ns to 130 ns.
Note 1: Refer to the specific device data sheet for BRG reload value calculation.
2: If there is no calculation mentioned in the data sheet, then the default BRG
reload value calculation should be considered.
or
Down Counter
TBRG =
TCY or TCY/2
(1)
I2CxBRG<8:0>
SCLx
Reload
Control
Reload
Note 1: Refer to specific device data sheet for the clock rate.
2
TSCL
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-PIC24FJ32MC102-I2C.pdf