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© 2010 Microchip Technology Inc. Preliminary DS39735A-page 47-7
Section 47. Motor Control PWM
Motor Control
PWM
47
Register 47-4: PxSECMP: Special Event Compare Register
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
SEVTDIR SEVTCMP14 SEVTCMP13 SEVTCMP12 SEVTCMP11 SEVTCMP10 SEVTCMP9 SEVTCMP8
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
SEVTCMP7 SEVTCMP6 SEVTCMP5 SEVTCMP4 SEVTCMP3 SEVTCMP2 SEVTCMP1 SEVTCMP0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented, read as 0
-n = Value at POR 1 = Bit is set 0 = Bit is cleared x = Bit is unknown
bit 15 SEVTDIR: Special Event Trigger Time Base Direction bit
(1)
1 = A Special Event Trigger will occur when the PWM time base is counting down
0 = A Special Event Trigger will occur when the PWM time base is counting up
bit 14-0 SEVTCMP<14:0>: Special Event Compare Value bits
(2)
Note 1: SEVTDIR is compared with PTDIR (PxTMR<15>) to generate the Special Event Trigger.
2: SEVTCMP<14:0> bits are compared with PxTMR<14:0> to generate the Special Event Trigger.

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