Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
PIC24F Family Reference Manual
DS39699B-page 23-25 © 2007 Microchip Technology Inc.
23.6 REGISTER MAPS
A summary of the registers associated with the PIC24F family SPIx module is provided in Table 23-2.
Table 23-2: SPIx Memory Map
Name Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
SPIxSTAT SPIEN
— SPISIDL — — SPIBEC2 SPIBEC1 SPIBEC0 SRMPT SPIROV SRXMPT SISEL2 SISEL1 SISEL0 SPIxTBF SPIxRBF 0000
SPIxCON1
— — — DISSCK DISSDO MODE16 SMP CKE SSEN CKP MSTEN SPRE2 SPRE1 SPRE0 PPRE1 PPRE0 0000
SPIxCON2 FRMEN SPIFSD SPIFPOL
— — — — — — — — — — — SPIFE SPIBEN 0000
SPIxBUF SPIx Transmit and Receive Buffer 0000
PMD1
T5MD T4MD T3MD T2MD T1MD — — — I2C1MD U2MD U1MD SPI2MD SPI1MD — — ADCMD 0000
PMD2
— — — IC5MD IC4MD IC3MD IC2MD IC1MD — — — OC5MD OC4MD OC3MD OC2MD OC1MD 0000
PMD3
— — — — — CMPMD RTCCMD PMPMD CRCPMD — — — — — I2CMD — 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexidecimal.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-Section23-Serial_Peripheral_Interface.pdf