Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
© 2005-2011 Microchip Technology Inc. DS70157F-page 61
Section 4. Instruction Set Details
Instruction Set
Details
4
4.2 PROGRAM ADDRESSING MODES
The 16-bit MCU and DSC devices have a 24-bit Program Counter (PC). The PC addresses the
24-bit wide program memory to fetch instructions for execution, and it may be loaded in several
ways. For byte compatibility with the table read and table write instructions, each instruction word
consumes two locations in program memory. This means that during serial execution, the PC is
loaded with PC + 2.
Several methods may be used to modify the PC in a non-sequential manner, and both absolute
and relative changes may be made to the PC. The change to the PC may be from an immediate
value encoded in the instruction, or a dynamic value contained in a working register. In dsPIC30F,
dsPIC33F, and dsPIC33E devices, when DO looping is active, the PC is loaded with the address
stored in the DOSTART register, after the instruction at the DOEND address is executed. For
exception handling, the PC is loaded with the address of the exception handler, which is stored
in the interrupt vector table. When required, the software stack is used to return scope to the
foreground process from where the change in program flow occurred.
Table 4-5 summarizes the instructions which modify the PC. When performing function calls, it is
recommended that RCALL be used instead of CALL, since RCALL only consumes 1 word of
program memory.
Table 4-5: Methods of Modifying Program Flow
Condition/Instruction PC Modification Software Stack Usage
Sequential Execution PC = PC + 2 None
BRA Expr
(1)
(Branch Unconditionally)
PC = PC + 2*Slit16 None
BRA Condition, Expr
(1)
(Branch Conditionally)
PC = PC + 2 (condition false)
PC = PC + 2 * Slit16 (condition true)
None
CALL Expr
(1)
(Call Subroutine)
PC = lit23 PC + 4 is PUSHed on the stack
(2)
CALL Wn
(Call Subroutine Indirect)
PC = Wn PC + 2 is PUSHed on the stack
(2)
CALL.L Wn
(5)
(Call Indirect Subroutine Long)
PC = {Wn+1:Wn} None
GOTO Expr
(1)
(Unconditional Jump)
PC = lit23 None
GOTO Wn
(Unconditional Indirect Jump)
PC = Wn None
GOTO.L Wn
(5)
(Unconditional Indirect Long Jump)
PC = {Wn+1:Wn} None
RCALL Expr
(1)
(Relative Call)
PC = PC + 2 * Slit16 PC + 2 is PUSHed on the stack
(2)
RCALL Wn
(Computed Relative Call)
PC = PC + 2 * Wn PC + 2 is PUSHed on the stack
(2)
Exception Handling PC = address of the exception handler
(read from vector table)
PC + 2 is PUSHed on the stack
(3)
PC = Target REPEAT instruction
(REPEAT Looping)
PC not modified (if REPEAT active) None
PC = DOEND address
(4)
(DO Looping)
PC = DOSTART (if DO active) None
Note 1: For BRA, CALL and GOTO, the Expr may be a label, absolute address, or expression, which is resolved by
the linker to a 16-bit or 23-bit value (Slit16 or lit23). See
Section 5. “Instruction Descriptions” for details.
2: After CALL or RCALL is executed, RETURN or RETLW will POP the Top-of-Stack (TOS) back into the PC.
3: After an exception is processed, RETFIE will POP the Top-of-Stack (TOS) back into the PC.
4: This condition/instruction is only available in dsPIC30F, dsPIC33F, and dsPIC33E devices.
5: This condition instruction is only available in dsPIC33E and PIC24E devices.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ64GA004-Programmers_Reference_Manual.pdf