Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
dsPIC33/PIC24 Family Reference Manual
DS70000582E-page 32 2009-2013 Microchip Technology Inc.
10.2 UART Transmit with DMA
If the DMA channel is associated with the UART transmitter, the UART issues a DMA request
after each successful transmission. After each DMA request, the DMA transfers new data into
the UxTXREG register and issues a CPU interrupt after a predefined number of transfers. As the
DMA channels are unidirectional, one DMA channel is required for transmit.
In addition, the UART must be configured to generate interrupts for every character transmitted.
For the UART transmitter to generate a TX interrupt for each character transmitted, the UART
Transmission Interrupt Mode Selection bits (UTXISEL0 and UTXISEL1) must be set to 0 in the
UxSTA register.
The UART transmitter issues a DMA request as soon as the UART and transmitter are enabled.
This means that the DMA channel and buffers must be initialized and enabled before the UART
and transmitter are enabled.
Note: For PIC24H, PIC24EP and dsPIC
®
devices only, alternatively, the UART transmitter
can be enabled before the DMA channel is enabled. In this case, the UART trans-
mitter DMA request will be lost and the user application must issue a DMA request
to start DMA transfers by setting the FORCE bit in the DMAxREQ register.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-PIC24FJ32MC102-UART.pdf