Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

PIC24F Family Reference Manual
DS39715A-page 4-6 Advance Information © 2007 Microchip Technology Inc.
4.3.3 Program Memory Low Word Access
The TBLRDL and TBLWTL instructions are used to access the lower 16 bits of program memory
data. The LSb of the W register address is ignored for word-wide table accesses. For byte-wide
accesses, the LSb of the W register address determines which byte is read. Figure 4-6
demonstrates the program memory data regions accessed by the TBLRDL and TBLWTL
instructions.
Figure 4-6: Program Data Table Access (lsw)
4.3.4 Program Memory High Word Access
The TBLRDH and TBLWTH instructions are used to access the upper 8 bits of the program
memory data. These instructions also support Word or Byte Access modes for orthogonality, but
the high byte of the program memory data will always return ‘0’, as shown in Figure 4-7.
Figure 4-7: Program Data Table Access (MSB)
4.3.5 Data Storage in Program Memory
It is assumed that for most applications, the high byte (P<23:16>) will not be used for data,
making the program memory appear 16 bits wide for data storage. It is recommended that the
upper byte of program data be programmed either as a NOP (0x00 or 0xFF), or as an illegal
opcode (0x3F) value, to protect the device from accidental execution of stored data. The TBLRDH
and TBLWTH instructions are primarily provided for array program/verification purposes and for
those applications that require compressed data storage.
0816
PC Address
0x000100
0x000102
0x000104
0x000106
23
00000000
00000000
00000000
00000000
Program Memory
‘Phantom’ Byte
(Read as ‘0’)
TBLRDL.W
TBLRDL.B (Wn<0> = 1)
TBLRDL.B (Wn<0> = 0)
0816
PC Address
0x000100
0x000102
0x000104
0x000106
23
00000000
00000000
00000000
00000000
Program Memory
‘Phantom’ Byte
(Read as ‘0’)
TBLRDH.W
TBLRDH.B (Wn<0> = 1)
TBLRDH.B (Wn<0> = 0)

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