Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2010 Microchip Technology Inc. Preliminary DS39735A-page 47-19
Section 47. Motor Control PWM
Motor Control
PWM
47
47.5.1 Duty Cycle
The MCPWM module has up to three PWM generators. There are four Special Function
Registers, PWM Duty Cycle (PxDC3:PxDC1), associated with the module to specify the duty
cycle values for the PWM generators. The duty cycle gives the time for which the PWM pulses
are active in a given PWM time period.
47.5.2 Dead-Time Generation
Dead-time generation is automatically enabled when any of the PWM I/O pin pairs are
operating in the Complementary Output mode. As the power devices cannot switch
instantaneously, some amount of time must be provided between the turn-off event of one
PWM output in a complementary pair and the turn-on event of the other transistor.
There are two programmable dead-time values. To increase user application flexibility, these
dead times can be used in either of the two methods described below:
The PWM output signals can be optimized for different turn-off times in the high-side and
low-side transistors. The first dead time is inserted between the turn-off event of the lower
transistor of the complementary pair and the turn-on event of the upper transistor. The
second dead time is inserted between the turn-off event of the upper transistor and the
turn-on event of the lower transistor.
The two dead times can be assigned to individual PWM I/O pairs. This operating mode
allows the PWM module to drive different transistor/load combinations with each
complementary PWM I/O pair.
There are up to two dead-time generation units (A and B) that can be configured in the
Dead-Time Control (PxDTCON1 and PxDTCON2) registers.
47.5.3 Output Override Control
The PWM module output override feature allows the user application to manually drive the
PWM I/O pins to specified logic states independent of the duty cycle comparison units. The
PWM override bits are useful when controlling various types of electrically commutated motors.
The output override feature can be controlled using the PWM Output Override
(POVD4H:POVD1L) bits in the Override Control (PxOVDCON<15:8>) register.
47.5.4 Special Event Trigger
The PWM module has a Special Event Trigger that allows analog-to-digital conversions to be
synchronized to the PWM time base. The analog-to-digital sampling and conversion time may
be programmed to occur at any point within the PWM period. The Special Event Compare
(PxSECMP) register specifies the special event compare value for generating the Special
Event Trigger to start analog-to-digital conversion.
Note: Detailed descriptions of the PWM timer, PWM time base period, output override
feature and Special Event Trigger are provided in subsequent sections.

e-Highlighter

Click to send permalink to address bar, or right-click to copy permalink.

Un-highlight all Un-highlight selectionu Highlight selectionh