Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 70 © 2005-2011 Microchip Technology Inc.
4.7 SOFTWARE STACK POINTER AND FRAME POINTER
4.7.1 Software Stack Pointer
The 16-bit MCU and DSC devices feature a software stack which facilitates function calls and
exception handling. W15 is the default Stack Pointer (SP) and after any Reset, it is initialized to
0x0800 (0x1000 for PIC24E and dsPIC33E devices). This ensures that the SP will point to valid
RAM and permits stack availability for exceptions, which may occur before the SP is set by the
user software. The user may reprogram the SP during initialization to any location within data
space.
The SP always points to the first available free word (Top-of-Stack) and fills the software stack,
working from lower addresses towards higher addresses. It pre-decrements for a stack POP
(read) and post-increments for a stack PUSH (write).
The software stack is manipulated using the PUSH and POP instructions. The PUSH and POP
instructions are the equivalent of a MOV instruction, with W15 used as the destination pointer. For
example, the contents of W0 can be PUSHed onto the Top-of-Stack (TOS) by:
PUSH W0
This syntax is equivalent to:
MOV W0,[W15++]
The contents of the TOS can be returned to W0 by:
POP W0
This syntax is equivalent to:
MOV [--W15],W0
During any CALL instruction, the PC is PUSHed onto the stack, such that when the subroutine
completes execution, program flow may resume from the correct location. When the PC is
PUSHed onto the stack, PC<15:0> is PUSHed onto the first available stack word, then
PC<22:16> is PUSHed. When PC<22:16> is PUSHed, the Most Significant 7 bits of the PC are
zero-extended before the PUSH is made, as shown in
Figure 4-4. During exception processing,
the Most Significant 7 bits of the PC are concatenated with the lower byte of the STATUS
register (SRL) and IPL<3>, CORCON<3>. This allows the primary STATUS register contents
and CPU Interrupt Priority Level to be automatically preserved during interrupts.
Figure 4-4: Stack Operation for CALL Instruction
Note: In order to protect against misaligned stack accesses, W15<0> is always clear.
0
15
W15 (before CALL)
W15 (after CALL)
Stack Grows Towards
Higher Address
0x0000
PC<15:0>
0x0 PC<22:16>
Top-of-Stack
0xFFFE
Note: For exceptions, the upper nine bits of the second PUSHed word contains
the SRL and IPL<3>.

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