Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
PIC24F Family Reference Manual
DS39715A-page 4-14 Advance Information © 2007 Microchip Technology Inc.
4.6.3 Run-Time Self-Programming (RTSP)
RTSP allows the user code to modify Flash program memory contents. RTSP is accomplished
using TBLRD (table read) and TBLWT (table write) instructions, and the NVM Control registers.
With RTSP, the user can erase program memory, 8 rows (64x8 = 512 instructions) at a time, and
can write program memory data, single rows (64 instructions) at a time
4.6.3.1 RTSP OPERATION
The PIC24F Flash program memory array is organized into rows of 64 instructions or 192 bytes.
RTSP allows the user to erase blocks of eight rows (512 instructions) at a time, and to program
64 instructions at a time. The 8-row erase blocks and single row write blocks are edge-aligned,
from the beginning of program memory, on boundaries of 1536 bytes and 192 bytes, respectively.
The program memory implements holding buffers that can contain 64 instructions of
programming data. Prior to the actual programming operation, the write data must be loaded into
the buffers in sequential order. The instruction words loaded must always be from a group of
64 boundaries.
The basic sequence for RTSP programming is to set up a Table Pointer, then do a series of
TBLWT instructions to load the buffers. Programming is performed by setting the control bits in
the NVMCON register. A total of 64 TBLWTL and TBLWTH instructions are required to load the
instructions.
All of the table write operations are single-word writes (2 instruction cycles), because only the
buffers are written. A programming cycle is required for programming each row.
4.6.4 Control Registers
There are two SFRs used to read and write the program Flash memory: NVMCON and NVMKEY.
The NVMCON register (Register 4-1) controls which blocks are to be erased, which memory type
is to be programmed and the start of the programming cycle.
NVMKEY is a write-only register that is used for write protection. To start a program or erase
sequence, the user must consecutively write 55h and AAh to the NVMKEY register.
4.6.4.1 NVMCON REGISTER
The NVMCON register is the primary control register for Flash and EEPROM program/erase
operations. This register selects whether an erase or program operation will be performed, and
is used to start the program or erase cycle.
The NVMCON register is shown in Register 4-1. The lower byte of NVMCOM configures the type
of NVM operation that will be performed.
Note: The number of rows, blocks and holding latches may vary from device to device;
please refer to the specific device data sheet for actual numbers.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-Section4-Program_Memory.pdf