Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
© 2005-2011 Microchip Technology Inc. DS70157F-page 395
Section 5. Instruction Descriptions
Instruction
Descriptions
5
SETM
Set f or WREG
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} SETM{.B} f
WREG
Operands: f ∈ [0 ... 8191]
Operation: For byte operation:
0xFF →destination designated by D
For word operation:
0xFFFF → destination designated by D
Status Affected: None
Encoding: 1110 1111 1BDf ffff ffff ffff
Description: All the bits of the specified register are set to ‘1’. If WREG is specified,
the bits of WREG are set. Otherwise, the bits of the specified file register
are set.
The ‘B’ bit selects byte or word operation (‘0’ for word, ‘1’ for byte).
The ‘D’ bit selects the destination (‘0’ for WREG, ‘1’ for file register).
The ‘f’ bits select the address of the file register.
Note 1: The extension .B in the instruction denotes a byte operation
rather than a word operation. You may use a .W extension to
denote a word operation, but it is not required.
2: The WREG is set to working register W0.
Words: 1
Cycles: 1
Example 1:
SETM.B 0x891 ; Set 0x891 (Byte mode)
Before
Instruction
After
Instruction
Data 0890 2739 Data 0890 FF39
SR 0000 SR 0000
Example 2:
SETM WREG ; Set WREG (Word mode)
Before
Instruction
After
Instruction
WREG (W0) 0900 WREG (W0) FFFF
SR 0000 SR 0000
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ64GA004-Programmers_Reference_Manual.pdf