Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

PIC24FJ64GA004 FAMILY
DS39881E-page 76 2010-2013 Microchip Technology Inc.
REGISTER 7-13: IEC3: INTERRUPT ENABLE CONTROL REGISTER 3
U-0 R/W-0 U-0 U-0 U-0 U-0 U-0 U-0
RTCIE
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 U-0
MI2C2IE SI2C2IE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as 0
-n = Value at POR 1 = Bit is set 0 = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as 0
bit 14 RTCIE: Real-Time Clock/Calendar Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 13-3 Unimplemented: Read as 0
bit 2 MI2C2IE: Master I2C2 Event Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 1 SI2C2IE: Slave I2C2 Event Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 0 Unimplemented: Read as 0

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