Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
© 2011-2012 Microchip Technology Inc. Preliminary DS39997C-page 41
TABLE 4-8: INPUT CAPTURE REGISTER MAP
SFR Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit
IC1BUF 0140 Input 1 Capture Register
IC1CON 0142
— —
ICSIDL
— — — — —
ICTMR ICI<1:0> ICOV ICBNE
IC2BUF 0144 Input 2 Capture Register
IC2CON 0146
— —
ICSIDL
— — — — —
ICTMR ICI<1:0> ICOV ICBNE
IC3BUF 0148 Input 3 Capture Register
IC3CON 014A
— —
ICSIDL
— — — — —
ICTMR ICI<1:0> ICOV ICBNE
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-9: OUTPUT COMPARE REGISTER MAP
SFR Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
OC1RS 0180 Output Compare 1 Secondary Register
OC1R 0182 Output Compare 1 Register
OC1CON 0184
— —
OCSIDL
— — — — — — — —
OCFLT OCTSEL
OC2RS 0186 Output Compare 2 Secondary Register
OC2R 0188 Output Compare 2 Register
OC2CON 018A
— —
OCSIDL
— — — — — — — —
OCFLT OCTSEL
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-FamilyDataSheet.pdf