Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2010 Microchip Technology Inc. Preliminary DS39741A-page 48-13
Section 48. Comparator with Blanking
Comparator with
Blanking
48
Register 48-6: CVRCON: Comparator Voltage Reference Control Register
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
VREFSEL BGSEL<1:0>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CVREN CVROE
(1)
CVRR CVRSS CVR<3:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-11 Unimplemented: Read as ‘0
bit 10 VREFSEL: Voltage Reference Select bit
1 = CV
REFIN = CVREF pin
0 = CV
REFIN is generated by the resistor network
bit 9-8 BGSEL<1:0>: Band Gap Reference Source Select bits
11 = INTREF = CV
REF pin
10 = INTREF = 1.2V (nominal)
01 = INTREF = AV
DD
00 = INTREF = AVDD
bit 7 CVREN: Comparator Voltage Reference Enable bit
1 = Comparator voltage reference circuit powered on
0 = Comparator voltage reference circuit powered down
bit 6 CVROE: Comparator Voltage Reference Output Enable bit
(1)
1 = Voltage level is output on CVREF pin
0 = Voltage level is disconnected from CVREF pin
bit 5 CVRR: Comparator Voltage Reference Range Selection bit
1 = CVRSRC/24 step size
0 = CVRSRC/32 step size
bit 4 CVRSS: Comparator Voltage Reference Source Selection bit
1 = Comparator voltage reference source, CV
RSRC = AVDD – AVSS
0 = Comparator voltage reference source, CVRSRC = AVDD – AVSS
bit 3-0 CVR<3:0> Comparator Voltage Reference Value Selection bits
When CVRR =
1:
CVREFIN = (CVR<3:0>/24) · (CVRSRC)
When CVRR =
0:
CVREFIN = 1/4 · (CVRSRC) + (CVR<3:0>/32) · (CVRSRC)
Note 1: The CVROE bit overrides the TRIS bit setting.

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