Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2005-2011 Microchip Technology Inc. DS70157F-page 121
Section 5. Instruction Descriptions
Instruction
Descriptions
5
ASR
Arithmetic Shift Right by Short Literal
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} ASR Wb, #lit4, Wnd
Operands: Wb [W0 ... W15]
lit4 [0...15]
Wnd [W0 ... W15]
Operation: lit4<3:0> Shift_Val
Wb<15> Wnd<15:15-Shift_Val + 1>
Wb<15:Shift_Val> Wnd<15-Shift_Val:0>
Status Affected: N, Z
Encoding: 1101 1110 1www wddd d100 kkkk
Description: Arithmetic shift right the contents of the source register Wb by the 4-bit
unsigned literal, and store the result in the destination register Wnd. After
the shift is performed, the result is sign-extended. Direct addressing must
be used for Wb and Wnd.
The ‘w’ bits select the address of the base register.
The ‘d’ bits select the destination register.
The ‘k’ bits provide the literal operand.
Note: This instruction operates in Word mode only.
Words: 1
Cycles: 1
Example 1:
ASR W0, #0x4, W1 ; ASR W0 by 4 and store to W1
Before
Instruction
After
Instruction
W0 060F W0 060F
W1 1234 W1 0060
SR 0000 SR 0000
Example 2:
ASR W0, #0x6, W1 ; ASR W0 by 6 and store to W1
Before
Instruction
After
Instruction
W0 80FF W0 80FF
W1 0060 W1 FE03
SR 0000 SR 0008 (N = 1)
Example 3:
ASR W0, #0xF, W1 ; ASR W0 by 15 and store to W1
Before
Instruction
After
Instruction
W0 70FF W0 70FF
W1 CC26 W1 0000
SR 0000 SR 0002 (Z = 1)

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