Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

2010-2013 Microchip Technology Inc. DS39881E-page 25
PIC24FJ64GA004 FAMILY
TABLE 3-1: CPU CORE REGISTERS
FIGURE 3-2: PROGRAMMERS MODEL
Register(s) Name Description
W0 through W15 Working Register Array
PC 23-Bit Program Counter
SR ALU STATUS Register
SPLIM Stack Pointer Limit Value Register
TBLPAG Table Memory Page Address Register
PSVPAG Program Space Visibility Page Address Register
RCOUNT Repeat Loop Counter Register
CORCON CPU Control Register
N OV Z C
TBLPAG
22
0
7
0
015
Program Counter
Table Memory Page
ALU STATUS Register (SR)
Working/Address
Registers
W0 (WREG)
W1
W2
W3
W4
W5
W6
W7
W8
W9
W10
W11
W12
W13
Frame Pointer
Stack Pointer
PSVPAG
7
0
Program Space Visibility
RA
0
RCOUNT
15
0
Repeat Loop Counter
SPLIM
Stack Pointer Limit
SRL
Registers or bits shadowed for PUSH.S and POP.S instructions.
0
0
Page Address Register
15
0
CPU Control Register (CORCON)
SRH
W14
W15
DC
IPL
2 1 0
IPL3 PSV
PC
Divider Working Registers
Multiplier Registers
15
0
Value Register
Address Register
Register

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