Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2005-2011 Microchip Technology Inc. DS70157F-page 63
Section 4. Instruction Set Details
Instruction Set
Details
4
4.3.2 Instruction Stalls and Exceptions
In order to maintain deterministic operation, instruction stalls are allowed to happen, even if they
occur immediately prior to exception processing.
4.3.3 Instruction Stalls and Instructions that Change Program Flow
CALL and RCALL write to the stack using W15 and may, therefore, be subject to an instruction
stall if the source read of the subsequent instruction uses W15.
GOTO, RETFIE and RETURN instructions are never subject to an instruction stall because they
do not perform write operations to the working registers.
4.3.4 Instruction Stalls and DO/REPEAT Loops
Instructions operating in a DO or REPEAT loop are subject to instruction stalls, just like any other
instruction. Stalls may occur on loop entry, loop exit and also during loop processing.
4.3.5 Instruction Stalls and PSV
Instructions operating in PSV address space are subject to instruction stalls, just like any other
instruction. Should a data dependency be detected in the instruction immediately following the
PSV data access, the second cycle of the instruction will initiate a stall. Should a data
dependency be detected in the instruction immediately before the PSV data access, the last
cycle of the previous instruction will initiate a stall.
Note: DO loops are only available in dsPIC30F, dsPIC33F, and dsPIC33E devices.
Note: Refer to the specific device family reference manual for more detailed information
about RAW instruction stalls.

e-Highlighter

Click to send permalink to address bar, or right-click to copy permalink.

Un-highlight all Un-highlight selectionu Highlight selectionh