Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2005-2011 Microchip Technology Inc. DS70157F-page 223
Section 5. Instruction Descriptions
Instruction
Descriptions
5
DISI
Disable Interrupts Temporarily
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} DISI #lit14
Operands: lit14 [ 0 ... 16383]
Operation: lit14 DISICNT
1 DISI
Disable interrupts for (lit14 + 1) cycles
Status Affected: None
Encoding: 1111 1100 00kk kkkk kkkk kkkk
Description: Disable interrupts of priority 0 through priority 6 for (lit14 + 1) instruction
cycles. Priority 0 through priority 6 interrupts are disabled starting in the
cycle that DISI executes, and remain disabled for the next (lit 14) cycles.
The lit14 value is written to the DISICNT register, and the DISI flag
(INTCON2<14>) is set to ‘1’. This instruction can be used before
executing time critical code, to limit the effects of interrupts.
Note 1: This instruction does not prevent priority 7 interrupts and traps
from running. See the specific device family reference manual
for details.
2: This instruction does not prevent any interrupts when the
device is in Sleep mode.
Words: 1
Cycles: 1
Example 1:
002000 HERE: DISI #100 ; Disable interrupts for 101 cycles
002002 ; next 100 cycles protected by DISI
002004 . . .
Before
Instruction
After
Instruction
PC 00 2000 PC 00 2002
DISICNT 0000 DISICNT 0100
INTCON2 0000 INTCON2 4000 (DISI = 1)
SR 0000 SR 0000

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