Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
© 2005-2011 Microchip Technology Inc. DS70157F-page 261
Section 5. Instruction Descriptions
Instruction
Descriptions
5
IOR
Inclusive OR Literal and Wn
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} IOR{.B} #lit10, Wn
Operands: lit10 ∈ [0 ... 255] for byte operation
lit10 ∈ [0 ... 1023] for word operation
Wn ∈ [W0 ... W15]
Operation: lit10.IOR.(Wn) → Wn
Status Affected: N, Z
Encoding:
1011 0011 0Bkk kkkk kkkk dddd
Description: Compute the logical inclusive OR operation of the 10-bit literal operand
and the contents of the working register Wn and place the result back into
the working register Wn.
The ‘B’ bit selects byte or word operation (‘0’ for word, ‘1’ for byte).
The ‘k’ bits specify the literal operand.
The ‘d’ bits select the address of the working register.
Note 1: The extension .B in the instruction denotes a byte operation
rather than a word operation. You may use a .W extension to
denote a word operation, but it is not required.
2: For byte operations, the literal must be specified as an
unsigned value [0:255]. See Section 4.6 “Using 10-bit Literal
Operands” for information on using 10-bit literal operands in
Byte mode.
Words: 1
Cycles: 1
Example 1:
IOR.B #0xAA, W9 ; IOR 0xAA to W9
; (Byte mode)
Before
Instruction
After
Instruction
W9 1234 W9 12BE
SR 0000 SR 0008 (N = 1)
Example 2:
IOR #0x2AA, W4 ; IOR 0x2AA to W4
; (Word mode)
Before
Instruction
After
Instruction
W4 A34D W4 A3EF
SR 0000 SR 0008 (N = 1)
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ64GA004-Programmers_Reference_Manual.pdf