Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2005-2011 Microchip Technology Inc. DS70157F-page 497
Index
Index
INDEX
Symbols
__builtin_addab................................................................. 447
__builtin_btg.............................................................. 447, 448
__builtin_divmodud ........................................................... 454
__builtin_divsd .................................................................. 454
__builtin_edsoffset ............................................................ 458
__builtin_edspage............................................................. 458
__builtin_mac.................................................................... 460
__builtin_modsd................................................................ 462
__builtin_modud................................................................ 462
__builtin_mpy.................................................................... 464
__builtin_mpyn.................................................................. 465
__builtin_mulss ................................................................. 468
__builtin_muluu................................................................. 469
__builtin_nop..................................................................... 470
__builtin_psvoffset ............................................................ 470
__builtin_sac ..................................................................... 472
__builtin_subab................................................................. 475
__builtin_tbladdress .......................................................... 475
__builtin_tblwth ................................................................. 478
__builtin_tblwtl .................................................................. 479
A
Accumulator A, Accumulator B ........................................... 19
Accumulator Access ........................................................... 84
Accumulator Selection ........................................................ 97
Accumulator Usage............................................................. 83
Addressing Modes for Wd Destination Register ................. 95
Addressing Modes for Ws Source Register ........................ 95
Assigned Working Register Usage ..................................... 78
B
Built-In Functions
__builtin_addab......................................................... 447
__builtin_btg...................................................... 447, 448
__builtin_divmodud ................................................... 454
__builtin_divsd .......................................................... 454
__builtin_edsoffset .................................................... 458
__builtin_edspage..................................................... 458
__builtin_mac............................................................ 460
__builtin_modsd........................................................ 462
__builtin_modud........................................................ 462
__builtin_mpy............................................................ 464
__builtin_mpyn.......................................................... 465
__builtin_mulss ......................................................... 468
__builtin_muluu......................................................... 469
__builtin_nop............................................................. 470
__builtin_psvoffset .................................................... 470
__builtin_sac ............................................................. 472
__builtin_subab......................................................... 475
__builtin_tbladdress .................................................. 475
__builtin_tblwth ......................................................... 478
__builtin_tblwtl .......................................................... 479
Byte Operations .................................................................. 64
C
Code Examples
’Z’ Status bit Operation for 32-bit Addition .................. 77
Base MAC Syntax....................................................... 85
File Register Addressing............................................. 53
File Register Addressing and WREG.......................... 53
Frame Pointer Usage.................................................. 73
Illegal Word Move Operations..................................... 68
Immediate Addressing................................................ 59
Indirect Addressing with Effective Address Update.... 55
Indirect Addressing with Register Offset .................... 56
Legal Word Move Operations..................................... 67
MAC Accumulator WB Syntax .................................... 87
MAC Prefetch Syntax ................................................. 86
Move with Literal Offset Instructions........................... 56
MSC Instruction with Two Prefetches and Accumulator
Write Back .......................................................... 87
Normalizing with FBCL ............................................... 90
Register Direct Addressing......................................... 54
Sample Byte Math Operations.................................... 65
Sample Byte Move Operations................................... 64
Scaling with FBCL ...................................................... 89
Stack Pointer Usage................................................... 71
Unsigned f and WREG Multiply (Legacy MULWF
Instruction).......................................................... 80
Using 10-bit Literals for Byte Operands...................... 69
Using the Default Working Register WREG ............... 79
Conditional Branch Instructions .......................................... 76
Core Control Register ......................................................... 24
D
Data Addressing Mode Tree............................................... 59
Data Addressing Modes ..................................................... 52
DCOUNT Register .............................................................. 20
Default Working Register (WREG) ............................... 18, 79
Development Support ........................................................... 6
DOEND Register ................................................................ 21
DOSTART Register ............................................................ 20
DSP Accumulator Instructions ............................................ 88
DSP Data Formats.............................................................. 81
DSP MAC Indirect Addressing Modes................................ 57
DSP MAC Instructions ........................................................ 84
F
File Register Addressing..................................................... 52
I
Immediate Addressing ........................................................ 58
Operands in the Instruction Set .................................. 58
Implied DSP Operands ....................................................... 78
Implied Frame and Stack Pointer ....................................... 78
Instruction Bit Map ............................................................ 484
Instruction Description Example ......................................... 98
Instruction Descriptions ...................................................... 99
ADD (16-bit Signed Add to Accumulator) ................. 104
ADD (Add Accumulators) ......................................... 103
ADD (Add f to WREG) ................................................ 99
ADD (Add Literal to Wn) ........................................... 100
ADD (Add Wb to Short Literal) ................................. 101
ADD (Add Wb to Ws)................................................ 102
ADDC (Add f to WREG with Carry) .......................... 106
ADDC (Add Literal to Wn with Carry) ....................... 107
ADDC (Add Wb to Short Literal with Carry).............. 108
ADDC (Add Wb to Ws with Carry) ............................ 110
AND (AND f and WREG) .......................................... 112
AND (AND Literal and Wn)....................................... 113
AND (AND Wb and Short Literal) ............................. 114
AND (AND Wb and Ws) ........................................... 115
ASR (Arithmetic Shift Right by Short Literal) ............ 121
ASR (Arithmetic Shift Right by Wns) ........................ 122
ASR (Arithmetic Shift Right f) ................................... 117
ASR (Arithmetic Shift Right Ws) ............................... 119

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