Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2011-2012 Microchip Technology Inc. Preliminary DS39997C-page 81
PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
REGISTER 7-7: IFS2: INTERRUPT FLAG STATUS REGISTER 2
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 15 bit 8
U-0 U-0 R/W-0 U-0 U-0 U-0 U-0 U-0
IC3IF
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-6 Unimplemented: Read as ‘0
bit 5 IC3IF: Input Capture Channel 3 Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 4-0 Unimplemented: Read as ‘0
REGISTER 7-8: IFS3: INTERRUPT FLAG STATUS REGISTER 3
R/W-0 R/W-0 U-0 U-0 U-0 U-0 R/W-0 U-0
FLTA1IF RTCCIF
PWM1IF
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 FLTA1IF: PWM1 Fault A Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 14 RTCCIF: RTCC Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 13-10 Unimplemented: Read as ‘0
bit 9 PWM1IF: PWM1 Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 8-0 Unimplemented: Read as ‘0

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