Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

2007-2014 Microchip Technology Inc. DS70000195F-page 17
Inter-Integrated Circuit™ (I
2
C™)
Register 3-6: ISRCCON: I2Cx Current Source Control Register
(1)
R/W-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
ISRCEN OUTSEL2 OUTSEL1 OUTSEL0
bit 15 bit 8
U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ISRCCAL5
(2)
ISRCCAL4
(2)
ISRCCAL3
(2)
ISRCCAL2
(2)
ISRCCAL1
(2)
ISRCCAL0
(2)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 ISRCEN: I2Cx Current Source Enable bit
1 = Current source is enabled
0 = Current source is disabled
bit 14-11 Unimplemented: Read as ‘0
bit 10-8 OUTSEL<2:0>: Output Select for Current bits
111 = Reserved
110 = Reserved
101 = Reserved
100 = Selected input pin is ISRC4 (AN4)
011 = Selected input pin is ISRC3 (AN5)
010 = Selected input pin is ISRC2 (AN6)
001 = Selected input pin is ISRC1 (AN7)
000 = No output is selected
bit 7-6 Unimplemented: Read as ‘0
bit 5-0 ISRCCAL<5:0>: I2Cx Current Source Calibration bits
(2)
Note 1: This register is not available on all devices. Refer to the specific device data sheet for availability.
2: The calibration value must be retrieved from the Flash memory and stored in this location at start-up time.

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