Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
DS70000195F-page 54 2007-2014 Microchip Technology Inc.
Figure 7-13: Slave Message (Write Data to Slave: 7-Bit Address; Buffer Overrun; A10M = 0; GCEN = 0; IPMIEN = 0; AHEN = 0;
STRICT = 0 and BOEN = 0)
SCLx (Master)
SDAx (Master)
SCLx (Slave)
SDAx (Slave)
I2CxRCV
RBF
SI2CxIF
STREN
1 2 3 4 5 6 7 8
A2 A1
9
A
D7 D6 D5 D4 D3 D2 D1
1 2 3 4 5 6 7 8 9
21
A
3 4
1
Slave receives address byte. Address matches. Slave generates interrupt. Address byte
2
Next received byte is message data. The byte moved to I2CxRCV register, sets RBF.
5
User software reads I2CxRCV register. RBF bit
6 User software clears I2COV bit. Reception will sti
Slave generates interrupt. Slave Acknowledges reception.
A7 A6 A5 A4 A3
S
P
I2COV
R/W
D/A
D7 D6 D5 D4 D3 D2 D1
1 2 3 4 5 6 7 8 9
N
D7 D6 D5 D4 D3 D2 D1
1 2 3 4 5 6 7 8 9
D7 D6 D5 D4 D3
1 2 3 4 5
SCLREL
5
3
Next byte received before I2CxRCV read by software. I2CxRCV register unchanged.
I2COV overflow bit set. Slave generates interrupt. Slave sends NACK for reception.
N
6
4
Next byte also received before I2CxRCV read by
reception. The master state machine should not be pro
register unchanged. Slave generates interrupt.
D0 D0
W
D0
5
normally until the module sees a stop/repeated st
conditions is met, an additional transmission will be
send a NACK and set the I2COV bit again.
another byte after receiving a NACK in this manner
the transmission with a stop condition or send a re
and attempt to retransmit the data.
is moved to I2CxRCV register and must be read by user software to prevent buffer overflow.
SI2CxIF Cleared by User Software
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-PIC24FJ32MC102-I2C.pdf