Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

PIC24F Family Reference Manual
DS39699B-page 23-13 Advance Information © 2007 Microchip Technology Inc.
Figure 23-5: SPIx Slave Mode Timing (Slave Select Pin Disabled)
(3)
SCKx Input
(CKP = 1
SCKx Input
(CKP = 0
Input
Sample
SDIx Input
bit 7
bit 0
SDOx
bit 7
bit 6
bit 5 bit 4
bit 3
bit 2
bit 1 bit 0
SPIxIF
(SMP = 0)
CKE = 0)
(1)
CKE = 0)
(1)
(SMP = 0)
User writes to
SPIxBUF
(2)
SPIxSR to
SPIxRXB
SPIxTBF
SPIxRBF
Output
Note 1: Two SPIx Clock modes shown only to demonstrate CKP (SPIxCON<6>) and CKE (SPIxCON<8>) bit functionality.
Any combination of CKP and CKE bits can be chosen for module operation.
2: If there are no pending transmissions or a transmission is in progress, SPIxBUF is transferred to SPIxSR as soon
as the user writes to SPIxBUF.
3: Operation for 8-bit mode shown; the 16-bit mode is similar.
1 instruction cycle latency to set
SPIxIF flag bit

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