Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

referenced directly from the application projects, or can be copied locally to the project folder.
These provided linker files generate the required code to handle the reset and interrupt remapping sections that are required.
1.6.3.2.3.2.2 Memory Map
This section discusses the various memory regions in the PIC24F device and how they are arranged between the boot
loaders and the target applications.
Description
The PIC24F boot loaders have several different special memory regions. Some of these regions are defined by the
hardware. Others are part of the boot loader implementation and usage. This section discusses what each of these memory
regions are. For more information about how these sections are implemented or how to change them, please refer to the
Understanding and Customizing the Boot Loader Implementation section.
The different memory regions are shown below:
1) Reset Vector - the reset vector is defined by the hardware. This is located at address 0x0000. Any reset of the CPU will
go to the reset vector. The main responsibility of the reset vector is to jump to the code that needs to be run. In the case of
the boot loader, this means jumping to the boot loader code (section 4).
2) The interrupt vector table (IVT) is another section that is defined by the PIC24F hardware. The IVT is a fixed set of
addresses that specify where the CPU should jump to in the case of an interrupt event. Each interrupt has it's own vector in
the table. When that interrupt occurs, the CPU fetches the address in the table corresponding to that interrupt and jumps to
1.6 Demos MLA - USB Library Help Device - Boot Loader - HID
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