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© 2005-2011 Microchip Technology Inc. DS70157F-page 393
Section 5. Instruction Descriptions
Instruction
Descriptions
5
SE
Sign-Extend Ws
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} SE Ws, Wnd
[Ws],
[Ws++],
[Ws--],
[++Ws],
[--Ws],
Operands: Ws ∈ [W0 ... W15]
Wnd ∈ [W0 ... W15]
Operation: Ws<7:0> → Wnd<7:0>
If (Ws<7> =
1):
0xFF → Wnd<15:8>
Else:
0 → Wnd<15:8>
Status Affected: N, Z, C
Encoding: 1111 1011 0000 0ddd dppp ssss
Description: Sign-extend the byte in Ws and store the 16-bit result in Wnd. Either
register direct or indirect addressing may be used for Ws, and register
direct addressing must be used for Wnd. The C flag is set to the
complement of the N flag.
The ‘d’ bits select the destination register.
The ‘p’ bits select the source Address mode.
The ‘s’ bits select the source register.
Note 1: This operation converts a byte to a word, and it uses no .B or
.W extension.
2: The source Ws is addressed as a byte operand, so any
address modification is by ‘1’.
Words: 1
Cycles:
1
(1)
Note 1:
In dsPIC33E and PIC24E devices, the listed cycle count does not apply to read and
read-modify-write operations on non-CPU Special Function Registers. For more
details, see
Note 3
in
Section 3.2.1 “Multi-Cycle Instructions”
.
Example 1:
SE W3, W4 ; Sign-extend W3 and store to W4
Before
Instruction
After
Instruction
W3 7839 W3 7839
W4 1005 W4 0039
SR 0000 SR 0001 (C = 1)
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ64GA004-Programmers_Reference_Manual.pdf