Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 398 © 2005-2011 Microchip Technology Inc.
SFTAC
Arithmetic Shift Accumulator by Wb
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X
Syntax: {label:} SFTAC Acc, Wb
Operands: Acc [A,B]
Wb [W0 ... W15]
Operation: Shift
(Wb)
(Acc) Acc
Status Affected: OA, OB, OAB, SA, SB, SAB
Encoding: 1100 1000 A000 0000 0000 ssss
Description: Arithmetic shift the 40-bit contents of the specified accumulator and store
the result back into the accumulator. The Least Significant 6 bits of Wb
are used to specify the shift amount. The shift range is -16:16, where a
negative value indicates a left shift and a positive value indicates a right
shift. Any bits which are shifted out of the accumulator are lost.
The ‘A’ bit selects the accumulator for the source/destination.
The ‘s’ bits select the address of the shift count register.
Note 1: If saturation is enabled for the target accumulator (SATA,
CORCON<7> or SATB, CORCON<6>), the value stored to
the accumulator is subject to saturation.
2: If the shift amount is greater than 16 or less than -16, no
modification will be made to the accumulator, and an
arithmetic trap will occur.
Words: 1
Cycles: 1
Example 1:
SFTAC A, W0
; Arithmetic shift ACCA by (W0)
; Store result to ACCA
; CORCON = 0x0000 (saturation disabled)
Before
Instruction
After
Instruction
W0 FFFC W0 FFFC
ACCA 00 320F AB09 ACCA 03 20FA B090
CORCON 0000 CORCON 0000
SR 0000 SR 8800 (OA, OAB = 1)
Example 2:
SFTAC B, W12
; Arithmetic shift ACCB by (W12)
; Store result to ACCB
; CORCON = 0x0040 (SATB = 1)
Before
Instruction
After
Instruction
W12 000F W12 000F
ACCB FF FFF1 8F4C ACCB FF FFFF FFE3
CORCON 0040 CORCON 0040
SR 0000 SR 0000

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