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© 2010 Microchip Technology Inc. Preliminary DS39737A-page 49-39
Section 49. 10-Bit ADC with 4 Simultaneous Conversions
10-Bit ADC with
4 Simultaneous
Conversions
49
Table 49-13: Scanning Through 6 Inputs per ADC Interrupt
CONTROL BITS
OPERATION SEQUENCE
Sequence Select Sample MUXA Inputs: AN0 CH0
SMPI<3:0> = 0110 Convert CH0, Write ADC1BUF0
Interrupt on 6th Sample Sample MUXA Inputs: AN1 CH0
CHPS<1:0> = 00 Convert CH0, Write ADC1BUF1
Sample Channel CH0 Sample MUXA Inputs: AN2 CH0
SIMSAM = N/A Convert CH0, Write ADC1BUF2
Not Applicable for Single Channel Sample Sample MUXA Inputs: AN3 CH0
BUFM = 0 Convert CH0, Write ADC1BUF3
Single 16-Word Result Buffer Sample MUXA Inputs: AN4 CH0
ALTS = 0 Convert CH0, Write ADC1BUF4
Always use MUXA Input Select Sample MUXA Inputs: AN5 CH0
MUXA Input Select Convert CH0, Write ADC1BUF5
CH0SA<3:0> = N/A ADC Interrupt
Override by CSCNA Repeat
CH0NA = 0
Select AV
SS for CH0- Input
CSCNA = 1
Scan CH0+ Inputs
CSSL<15:0> = 0000 0000 0011 1111
Scan Input Select Unused
CH123SA = N/A
Channel CH1, CH2, CH3 + Input Unused
CH123NA<1:0> = N/A
Channel CH1, CH2, CH3 – Input Unused
MUXB Input Select
CH0SB<3:0> = N/A
Channel CH0+ Input Unused
CH0NB = N/A
Channel CH0- Input Unused
CH123SB = N/A
Channel CH1, CH2, CH3 + Input Unused
CH123NB<1:0> = N/A
Channel CH1, CH2, CH3 – Input Unused
ADC Buffer @ First ADC Interrupt ADC Buffer @ Second ADC Interrupt
ADC1BUF0 AN0 Sample 1 AN0 Sample 7
ADC1BUF1 AN1 Sample 2 AN1 Sample 8
ADC1BUF2 AN2 Sample 3 AN2 Sample 9
ADC1BUF3 AN3 Sample 4 AN3 Sample 10
ADC1BUF4 AN4 Sample 5 AN4 Sample 11
ADC1BUF5 AN5 Sample 6 AN5 Sample 12

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