Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
© 2007 Microchip Technology Inc. Advance Information DS39715A-page 4-17
Section 4. Program Memory
Program
Memory
4
4.7 FLASH PROGRAMMING OPERATIONS
A complete programming sequence is necessary for programming or erasing the internal Flash
in RTSP mode. A programming operation is nominally 4 ms
(1)
in duration and the processor stalls
(waits) until the operation is finished. Setting the WR bit (NVMCON<15>) starts the operation and
the WR bit is automatically cleared when the operation is finished.
Flash programming operations are controlled using the following Nonvolatile Memory (NVM)
control register:
• NVMCON
• NVMKEY
4.7.1 Flash Program Memory Programming Algorithm
The user can program one row of program Flash memory at a time. To do this, it is necessary to
erase the 8-row erase block containing the desired row. The general process is:
1. Read eight rows of program memory (512 instructions) and store in data RAM.
2. Update the program data in RAM with the desired new data.
3. Erase the block:
a) Set the NVMOP bits (NVMCOM<3:0>) to ‘0010’ to configure for block erase. Set the
ERASE (NVMCOM<6>) and WREN (NVMCOM<14>) bits.
b) Write the starting address of the block to be erased into the TBLPAG and W registers.
c) Write 55h to NVMKEY.
d) Write AAh to NVMKEY.
e) Set the WR bit (NVMCOM<15>). The erase cycle begins and the CPU stalls for the
duration of the erase cycle. When the erase is done, the WR bit is cleared automatically.
4. Write the first 64 instructions from data RAM into the program memory buffers (see Section 4.5
“Program Memory Writes”).
5. Write the program block to Flash memory:
a) Set the NVMOP bits to ‘0001’ to configure for row programming. Clear the ERASE
bit and set the WREN bit.
b) Write 55h to NVMKEY.
c) Write AAh to NVMKEY.
d) Set the WR bit. The programming cycle begins and the CPU stalls for the duration of the
write cycle. When the write to Flash memory is done, the WR bit is cleared automatically.
6. Repeat steps 4 and 5, using the next available 64 instructions from the block in data RAM
by incrementing the value in TBLPAG, until all 512 instructions are written back to Flash
memory.
For protection against accidental operations, the write initiate sequence for NVMKEY must be
used to allow any erase or program operation to proceed. After the programming command has
been executed, the user must wait for the programming time until programming is complete. The
two instructions following the start of the programming sequence should be NOPs, as shown in
Section 4.6.4.2 “NVMKEY Register”.
Note 1: Programming time may vary from device to device; please refer to the specific
device data sheet for the exact value.
Note 1: Please refer to the specific device data sheet for the complete reference code of
Flash memory programming.
2: The number of rows, blocks and holding latches may vary from device to device;
please refer to the specific device data sheet for actual numbers.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-Section4-Program_Memory.pdf