Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
2007-2014 Microchip Technology Inc. DS70000195F-page 7
Inter-Integrated Circuit™ (I
2
C™)
2.2.6 SLAVE REPLY
The slave transmits the data byte by driving the SDAx line, while the master continues to
originate clocks but releases its SDAx drive.
2.2.7 MASTER ACKNOWLEDGE
During reads, a master must terminate data requests to the slave by generating a NACK on the
last byte of the message.
2.2.8 STOP MESSAGE
The master sends a Stop signal to terminate the message and returns the bus to an Idle state.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-PIC24FJ32MC102-I2C.pdf