Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2009 Microchip Technology Inc. DS39700C-page 6-9
Section 6. Oscillator
Oscillator
6
bit 4 G1CLKSEL: Display Controller Module Clock Select bit
(2)
1 = Use the 96 MHz clock as the graphics controller module clock (graphics clock option 1 branch, refer
to Figure 6-8)
0 = Use the 48 MHz clock as graphics controller module clock (graphics clock option 2 branch, refer to
Figure 6-8)
bit 3-0 Unimplemented: Read as ‘0
Register 6-2: CLKDIV: Clock Divider Register (Continued)
Note 1: This bit is automatically cleared when the ROI bit is set and an interrupt occurs.
2: These bits are available on USB-enabled or graphics-enabled devices only.
3: These system clock options are not compatible with the operation of the USB module. They may be used in
those instances when the PLL branch is selected as a clock source and the USB module is disabled.

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