Vault 7: Projects
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16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 52 © 2005-2011 Microchip Technology Inc.
4.1 DATA ADDRESSING MODES
The 16-bit MCU and DSC devices support three native Addressing modes for accessing data
memory, along with several forms of immediate addressing. Data accesses may be performed
using file register addressing, register direct or indirect addressing, and immediate addressing,
allow a fixed value to be used by the instruction.
File register addressing provides the ability to operate on data stored in the lower 8K of data
memory (Near RAM), and also move data between the working registers and the entire 64K data
space. Register direct addressing is used to access the 16 memory mapped working registers,
W0:W15. Register indirect addressing is used to efficiently operate on data stored in the entire
64K data space (and also Extended Data Space, in the case of dsPIC33E/PIC24E), using the
contents of the working registers as an effective address. Immediate addressing does not access
data memory, but provides the ability to use a constant value as an instruction operand. The
address range of each mode is summarized in
Table 4-1.
Table 4-1: 16-bit MCU and DSC Addressing Modes
4.1.1 File Register Addressing
File register addressing is used by instructions which use a predetermined data address as an
operand for the instruction. The majority of instructions that support file register addressing
provide access to the lower 8 Kbytes of data memory, which is called the Near RAM. However,
the MOV instruction provides access to all 64 Kbytes of memory using file register addressing.
This allows the loading of the data from any location in data memory to any working register, and
storing the contents of any working register to any location in data memory. It should be noted
that file register addressing supports both byte and word accesses of data memory, with the
exception of the MOV instruction, which accesses all 64K of memory as words. Examples of file
register addressing are shown in
Example 4-1.
Most instructions, which support file register addressing, perform an operation on the specified
file register and the default working register WREG (see Section 2.4 “Default Working
Register (WREG)”). If only one operand is supplied in the instruction, WREG is an implied
operand and the operation results are stored back to the file register. In these cases, the
instruction is effectively a read-modify-write instruction. However, when both the file register and
the WREG register are specified in the instruction, the operation results are stored in the WREG
register and the contents of the file register are unchanged. Sample instructions that show the
interaction between the file register and the WREG register are shown in
Example 4-2.
Addressing Mode Address Range
File Register 0x0000-0x1FFF
(1)
Register Direct 0x0000-0x001F (working register array W0:W15)
Register Indirect 0x0000-0xFFFF
Immediate N/A (constant value)
Note 1: The address range for the File Register MOV is 0x0000-0xFFFE.
Note: Instructions which support file register addressing use ‘f’ as an operand in the
instruction summary tables of
Section 3. “Instruction Set Overview”.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ64GA004-Programmers_Reference_Manual.pdf