Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
© 2005-2011 Microchip Technology Inc. DS70157F-page 243
Section 5. Instruction Descriptions
Instruction
Descriptions
5
EXCH
Exchange Wns and Wnd
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} EXCH Wns, Wnd
Operands: Wns ∈ [W0 ... W15]
Wnd ∈ [W0 ... W15]
Operation: (Wns) ↔ (Wnd)
Status Affected: None
Encoding:
1111 1101 0000 0ddd d000 ssss
Description: Exchange the word contents of two working registers. Register direct
addressing must be used for Wns and Wnd.
The ‘d’ bits select the address of the first register.
The ‘s’ bits select the address of the second register.
Note: This instruction only executes in Word mode.
Words: 1
Cycles: 1
Example 1:
EXCH W1, W9 ; Exchange the contents of W1 and W9
Before
Instruction
After
Instruction
W1 55FF W1 A3A3
W9 A3A3 W9 55FF
SR 0000 SR 0000
Example 2:
EXCH W4, W5 ; Exchange the contents of W4 and W5
Before
Instruction
After
Instruction
W4 ABCD W4 4321
W5 4321 W5 ABCD
SR 0000 SR 0000
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ64GA004-Programmers_Reference_Manual.pdf