Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2005-2011 Microchip Technology Inc. DS70157F-page 199
Section 5. Instruction Descriptions
Instruction
Descriptions
5
CPB
Compare Wb with lit5 using Borrow, Set Status Flags
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X
Syntax: {label:} CPB{.B} Wb, #lit5
Operands: Wb [W0 ... W15]
lit5 [ 0 ... 31]
Operation: (Wb) – lit5 – (C
)
Status Affected: DC, N, OV, Z, C
Encoding: 1110 0001 1www wB00 011k kkkk
Description: Compute (Wb) – lit5 – (C), and update the STATUS register. This
instruction is equivalent to the SUBB instruction, but the result of the
subtraction is not stored. Register direct addressing must be used for Wb.
The ‘w’ bits select the address of the Wb source register.
The ‘B’ bit selects byte or word operation (‘0’ for word, ‘1’ for byte).
The ‘k’ bits provide the literal operand, a five bit integer number.
Note 1: The extension .B in the instruction denotes a byte operation
rather than a word operation. You may use a .W extension to
denote a word operation, but it is not required.
2: The Z flag is “sticky” for ADDC, CPB, SUBB and SUBBR. These
instructions can only clear Z.
Words: 1
Cycles: 1
Example 1:
CPB.B W4, #0x12 ; Compare W4 with 0x12 using C (Byte mode)
Before
Instruction
After
Instruction
W4 7711 W4 7711
SR 0001 (C = 1) SR 0008 (N = 1)
Example 2:
CPB.B W4, #0x12 ; Compare W4 with 0x12 using C (Byte mode)
Before
Instruction
After
Instruction
W4 7711 W4 7711
SR 0000 SR 0008 (N = 1)
Example 3:
CPB W12, #0x1F ; Compare W12 with 0x1F using C (Word mode)
Before
Instruction
After
Instruction
W12 0020 W12 0020
SR 0002 (Z = 1) SR 0003 (Z, C = 1)
Example 4:
CPB W12, #0x1F ; Compare W12 with 0x1F using C (Word mode)
Before
Instruction
After
Instruction
W12 0020 W12 0020
SR 0003 (Z, C = 1) SR 0001 (C = 1)

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