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© 2005-2011 Microchip Technology Inc. DS70157F-page 155
Section 5. Instruction Descriptions
Instruction
Descriptions
5
BSW
Bit Write in Ws
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} BSW.C Ws, Wb
BSW.Z [Ws],
[Ws++],
[Ws--],
[++Ws],
[--Ws],
Operands: Ws [W0 ... W15]
Wb [W0 ... W15]
Operation: For “.C” operation:
C Ws<(Wb)>
For “.Z” operation (default):
Z Ws<(Wb)>
Status Affected: None
Encoding: 1010 1101 Zwww w000 0ppp ssss
Description: The (Wb) bit in register Ws is written with the value of the C or Z
flag from
the STATUS register. Bit numbering begins with the Least Significant bit
(bit 0) and advances to the Most Significant bit (bit 15) of the working
register. Only the four Least Significant bits of Wb are used to determine
the destination bit number. Register direct addressing must be used for
Wb, and either register direct, or indirect addressing may be used for Ws.
The ‘Z’ bit selects the C or Z flag as source.
The ‘w’ bits select the address of the bit select register.
The ‘p’ bits select the source Address mode.
The ‘s’ bits select the source register.
Note: This instruction only operates in Word mode. If no extension is
provided, the “.Z” operation is assumed.
Words: 1
Cycles:
1
(1)
Note 1:
In dsPIC33E and PIC24E devices, the listed cycle count does not apply to read and
read-modify-write operations on non-CPU Special Function Registers. For more
details, see
Note 3
in
Section 3.2.1 “Multi-Cycle Instructions”
.
Example 1:
BSW.C W2, W3 ; Set bit W3 in W2 to the value
; of the C bit
Before
Instruction
After
Instruction
W2 F234 W2 7234
W3 111F W3 111F
SR 0002 (Z = 1, C = 0) SR 0002 (Z = 1, C = 0)

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