Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
© 2007 Microchip Technology Inc. Advance Information DS39717A-page 3-3
Section 3. Data Memory
Data Memory
3
Figure 3-1: Data Space Memory Map for PIC24F Devices
0000h
07FEh
FFFEh
LSB
Address
LSBMSB
MSB
Address
0001h
07FFh
FFFFh
8001h
8000h
7FFFh
0801h
0800h
Near
SFR
SFR Space
7FFEh
Space
Data Space
1FFEh
2000h
1FFFh
2001h
Program Space
Visibility Area
Data RAM
Near
Data Space
Note 1: Data memory areas are not shown to scale.
2: Near data memory can be accessed directly via file register instructions that encode a 13-bit
address into the opcode. At a minimum, the near data memory region overlaps all of the SFR space.
3: The entire data memory can be accessed indirectly via W registers, or directly, using the MOV
instruction.
4: The upper half of the data memory can be mapped into a segment of program memory space for
program space visibility.
5: The actual size of the data memory implementation may differ. Refer to the specific device data
sheet for more information.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-Section3-Data_Memory.pdf