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PIC24F Family Reference Manual
DS39737A-page 49-10 Preliminary © 2010 Microchip Technology Inc.
Register 49-6: ADxCSSL: ADCx Input Scan Select Register Low
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 15 bit 8
U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — CSS5
(1)
CSS4
(1)
CSS3
(1)
CSS2
(1)
CSS1
(1)
CSS0
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 CSS<5:0>: ADC Input Scan Selection bits
(1)
1 = Select ANx for input scan
0 = Skip ANx for input scan
Note 1: Inputs selected for scan without a corresponding input on the device convert AVss.
Register 49-7: ADxPCFGL: ADCx Port Configuration Register Low
(1)
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 15 bit 8
U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — PCFG5
(1)
PCFG4
(1)
PCFG3
(1)
PCFG2
(1)
PCFG1
(1)
PCFG0
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 PCFG<5:0>: ADC Port Configuration Control bits
(1)
1 = Port pin in Digital mode; port read input enabled; ADC input multiplexer connected to AVSS
0 = Port pin in Analog mode, port read input disabled; ADC samples pin voltage
Note 1: PCFG bits are ignored on ports without a corresponding input on the device.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-Section49-10-Bit_ADC_with_4_Simultaneous_Conversions.pdf