Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

16-bit MCU and DSC Programmer’s Reference Manual
DS70157F-page 44 © 2005-2011 Microchip Technology Inc.
Table 3-5: Rotate/Shift Instructions
Assembly Syntax Description Words Cycles
Page
Number
ASR f {,WREG}
(1)
Destination = arithmetic right shift f, LSb C 1 1
(2)
117
ASR Ws,Wd Wd = arithmetic right shift Ws, LSb C 1 1
(2)
119
ASR Wb,#lit4,Wnd Wnd = arithmetic right shift Wb by lit4, LSb C 1 1 121
ASR Wb,Wns,Wnd Wnd = arithmetic right shift Wb by Wns,
LSb C
1 1 122
LSR f {,WREG}
(1)
Destination = logical right shift f, LSb C 1 1
(2)
269
LSR Ws,Wd Wd = logical right shift Ws, LSb C 1 1
(2)
271
LSR Wb,#lit4,Wnd Wnd = logical right shift Wb by lit4, LSb C 1 1 273
LSR Wb,Wns,Wnd Wnd = logical right shift Wb by Wns, LSb C 1 1 274
RLC f {,WREG}
(1)
Destination = rotate left through Carry f 1 1
(2)
373
RLC Ws,Wd Wd = rotate left through Carry Ws 1 1
(2)
375
RLNC f {,WREG}
(1)
Destination = rotate left (no Carry) f 1 1
(2)
377
RLNC Ws,Wd Wd = rotate left (no Carry) Ws 1 1
(2)
379
RRC f {,WREG}
(1)
Destination = rotate right through Carry f 1 1
(2)
381
RRC Ws,Wd Wd = rotate right through Carry Ws 1 1
(2)
383
RRNC f {,WREG}
(1)
Destination = rotate right (no Carry) f 1 1
(2)
385
RRNC Ws,Wd Wd = rotate right (no Carry) Ws 1 1
(2)
387
SL f {,WREG}
(1)
Destination = left shift f, MSb C 1 1
(2)
399
SL Ws,Wd Wd = left shift Ws, MSb C 1 1
(2)
401
SL Wb,#lit4,Wnd Wnd = left shift Wb by lit4, MSb C 1 1 403
SL Wb,Wns,Wnd Wnd = left shift Wb by Wns, MSb C 1 1 404
Note 1: When the optional {,WREG} operand is specified, the destination of the instruction is WREG. When
{,WREG} is not specified, the destination of the instruction is the file register f.
2: In dsPIC33E and PIC24E devices, read and read-modify-write operations on non-CPU Special Function
Registers require an additional cycle when compared to dsPIC30F, dsPIC33F, PIC24F and PIC24H
devices.

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