Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
2009-2013 Microchip Technology Inc. DS70000582E-page 45
UART
15.2 Smart Card Control Registers
Register 15-1: UxSCCON: UARTx Smart Card Control Register
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 15 bit 8
U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
TXRPT1
(1)
TXRPT0
(1)
CONV T0PD
(1)
PTRCL SCEN
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as 0
-n = Value at POR 1 = Bit is set 0 = Bit is cleared x = Bit is unknown
bit 15-6 Unimplemented: Read as 0
bit 5-4 TXRPT<1:0>: Transmit Repeat Selection bits
(1)
11 = Retransmit the error byte four times
10 = Retransmit the error byte three times
01 = Retransmit the error byte twice
00 = Retransmit the error byte once
bit 3 CONV: Logic Convention Selection bit
1 = Inverse logic convention
0 = Direct logic convention
bit 2 T0PD: Pull-Down Duration for T = 0 Error Handling bit
(1)
1 = 2 ETU
0 = 1 ETU
bit 1 PTRCL: Smart Card Protocol Selection bit
1 = T = 1
0 = T = 0
bit 0 SCEN: Smart Card Mode Enable bit
1 = Smart Card mode is enabled if UARTEN (UxMODE<15>) = 1
0 = Smart Card mode is disabled
Note 1: These bits are applicable to T = 0 only. See the PTRCL bit (UxSCCON<1>.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-PIC24FJ32MC102-UART.pdf