Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
© 2006 Microchip Technology Inc. Advance Information DS39703A-page 2-9
Section 2. CPU
CPU
2
Figure 2-7: Stack Pointer After a POP Instruction
2.3.2 W14 Software Stack Frame Pointer
A frame is a user-defined section of memory in the stack that is used by a single subroutine. W14
is a special working register because it can be used as a Stack Frame Pointer with the LNK (link)
and ULNK (unlink) instructions. W14 can be used in a normal working register by instructions
when it is not used as a Stack Frame Pointer.
Refer to the
“dsPIC30F Programmer’s Reference Manual”
(DS70030) for software examples that
use W14 as a Stack Frame Pointer.
2.3.3 Stack Pointer Overflow
There is a Stack Pointer Limit register (SPLIM) associated with the Stack Pointer that is reset to
0x0000. SPLIM is a 16-bit register, but SPLIM<0> is fixed to ‘0’ because all stack operations must
be word-aligned.
The stack overflow check will not be enabled until a word write to SPLIM occurs, after which time
it can only be disabled by a device Reset. All effective addresses generated using W15 as a
source or destination are compared against the value in SPLIM. If the contents of the Stack
Pointer (W15) are greater than the contents of the SPLIM register by 2, and a push operation is
performed, a stack error trap will not occur. The stack error trap will occur on a subsequent push
operation. Thus, for example, if it is desirable to cause a Stack Error Trap when the stack grows
beyond address 0x2000 in RAM, initialize the SPLIM with the value, 0x1FFE.
If stack overflow checking is enabled, a stack error trap also occurs if the W15 effective address
calculation wraps over the end of data space (0xFFFF).
Refer to Section 8. “Interrupts” for more information on the stack error trap.
2.3.4 Stack Pointer Underflow
The stack is initialized to 0x0800 during Reset. A stack error trap will be initiated should the Stack
Pointer address ever be less than 0x0800.
Note: A stack error trap may be caused by any instruction that uses the contents of the
W15 register to generate an Effective Address (EA). Thus, if the contents of W15
are greater than the contents of the SPLIM register by 2, and a CALL instruction is
executed or an interrupt occurs, a stack error trap will be generated.
Note: A write to the Stack Pointer Limit register, SPLIM, should not be followed by an
indirect read operation using W15.
Note: Locations in data space between 0x0000 and 0x07FF are, in general, reserved for
core and peripheral Special Function Registers.
0x0000
0xFFFE
0x05A5A
0x03636
0x3636 → W3
W15 = 0x0802
POP W3
0x0802
0x0800
W15
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-Section2-CPU.pdf