Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

PIC24F Family Reference Manual
DS39700C-page 6-28 © 2009 Microchip Technology Inc.
6.11.3 Aborting a Clock Switch
In the event the clock switch did not complete, the clock switch logic can be reset by clearing the
OSWEN bit. This will abandon the clock switch process, stop and reset the OST (if applicable),
and stop the PLL (if applicable). Typical assembly code for aborting a clock switch is shown in
Example 6-2.
A clock switch procedure can be aborted at any time. A clock switch that is already in progress
can also be aborted by performing a second clock switch.
Example 6-2: Aborting a Clock Switch
6.11.4 Entering Sleep Mode During a Clock Switch
If the device enters Sleep mode during a clock switch operation, the clock switch operation is
aborted. The processor keeps the old clock selection and the OSWEN bit is cleared. The PWRSAV
instruction is then executed normally.
MOV #OSCCON,W1 ; pointer to OSCCON
MOV.b #0x46,W2 ; first unlock code
MOV.b #0x57,W3 ; second unlock code
MOV.b W2, [W1] ; write first unlock code
MOV.b W3, [W1] ; write second unlock code
BCLR OSCCON,#OSWEN ; ABORT the switch

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