Vault 7: Projects

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PIC24FJ64GA004 FAMILY
DS39881E-page 138 2010-2013 Microchip Technology Inc.
FIGURE 14-1: OUTPUT COMPARE x MODULE BLOCK DIAGRAM
Comparator
Output
Logic
OCM<2:0>
Output Enable
OCx
(1)
Set Flag bit
OCxIF
(1)
OCxRS
(1)
Mode Select
(4)
3
Note 1: Where x is shown, reference is made to the registers associated with the respective Output Compare
Channels 1 through 5.
2: The OCFA pin controls the OC1-OC4 channels. The OCFB pin controls the OC5 channel.
3: Each output compare channel can use one of two selectable time bases. Refer to the device data sheet for
the time bases associated with the module.
4: This peripherals inputs and outputs must be assigned to an available RPn pin before use. Please see
Section 10.4 “Peripheral Pin Select (PPS)” for more information.
OCTSEL
0
1
1616
OCFA or OCFB
(2)
TMR Register Inputs
from Time Bases
(see Note 3)
Period Match Signals
from Time Bases
(see Note 3)
0
1
OCxR
(1)
QS
R

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