Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2005-2011 Microchip Technology Inc. DS70157F-page 369
Section 5. Instruction Descriptions
Instruction
Descriptions
5
RETLW
Return with Literal in Wn
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X
Syntax: {label:} RETLW{.B} #lit10, Wn
Operands: lit10 [0 ... 255] for byte operation
lit10 [0 ... 1023] for word operation
Wn [W0 ... W15]
Operation: (W15) – 2 W15
TOS<15:8> SR<7:0>
TOS<7:0> IPL<3>: PC<22:16>
(W15) – 2 W15
(TOS<15:1>) (PC<15:1>)
TOS<0> SFA bit
lit10 Wn
NOP Instruction register
Status Affected: SFA
Encoding: 0000 0101 0Bkk kkkk kkkk dddd
Description: Return from subroutine with the specified, unsigned 10-bit literal stored
in Wn. The software stack is POPped twice to restore the PC and the
signed literal is stored in Wn. Since two POPs are made, the Stack
Pointer (W15) is decremented by 4.
The ‘B’ bit selects byte or word operation (‘0’ for word, ‘1’ for byte).
The ‘k’ bits specify the value of the literal.
The ‘d’ bits select the destination register.
Note 1: The extension .B in the instruction denotes a byte operation
rather than a word operation. You may use a .W extension to
denote a word operation, but it is not required.
2: For byte operations, the literal must be specified as an
unsigned value [0:255]. See Section 4.6 “Using 10-bit Lit-
eral Operands” for information on using 10-bit literal
operands in Byte mode.
Words: 1
Cycles: 6 (5 if exception pending)
Example 1:
000440 RETLW.B #0xA, W0 ; Return with 0xA in W0
Before
Instruction
After
Instruction
PC 00 0440 PC 00 7006
W0 9846 W0 980A
W15 1988 W15 1984
Data 1984 7006 Data 1984 7006
Data 1986 0000 Data 1986 0000
SR 0000 SR 0000

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