Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

PIC24F Family Reference Manual
DS39717A-page 3-4 Advance Information © 2007 Microchip Technology Inc.
3.2.3 Near Data Memory
An 8-Kbyte address space, between 0x0000 and 0x1FFF, is referred to as near data memory.
Near data memory is directly addressable via a 13-bit absolute address field within all the file
register instructions.
Near data memory is also addressable by all the Indirect Addressing modes, where the data
memory address can be pointed to by any of the 16-bit working registers. Data memory region
beyond 0x1FFF is addressable only by the Indirect Addressing modes.
The memory regions included in the near data region will depend on the amount of data memory
implemented for each PIC24F family device variant. At a minimum, the near data region will
include all of the SFRs. Refer to Figure 3-1 for more details.
3.2.4 SFR Space
The first 2 Kbytes of the near data space, from 0000h to 07FFh, are primarily occupied with
Special Function Registers (SFRs). These are used by the PIC24F core and peripheral modules
for controlling the operation of the device.
SFRs are distributed among the modules that they control and are generally grouped together
by module. Much of the SFR space contains unused addresses; these are read as 0’. A diagram
of the SFR space that describes where SFRs are actually implemented is shown in Table 3-1.
Each implemented area indicates a 32-byte region where at least one address is implemented
as an SFR.
Table 3-1: Implemented Regions of SFR Data Space
(1)
SFR Space Address
xx00 xx20 xx40 xx60 xx80 xxA0 xxC0 xxE0
000h Core ICN Interrupts
100h Timers Capture
Compare
200h I
2
C™ UART SPI I/O
300h A/D
400h
500h
600h PMP RTC/Comp CRC I/O
700h
System NVM/PMD
Legend: — = No implemented SFRs in this block
Note 1: Refer to the specific device data sheet for actual register implementation.

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