Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

PIC24F Family Reference Manual
DS39724B-page 11-18 © 2010 Microchip Technology Inc.
11.5.2 Capacitance Calibration
There is a small amount of capacitance from the internal A/D Converter sample capacitor as well
as stray capacitance from the circuit board traces and pads that affect the precision of capaci-
tance measurements. A measurement of the stray capacitance can be taken by making sure the
desired capacitance to be measured has been removed. The measurement is then performed
using the following steps:
1. Initialize the A/D Converter and the CTMU.
2. Set EDG1STAT (= 1).
3. Wait for a fixed delay of time, t.
4. Clear EDG1STAT.
5. Perform an A/D conversion.
6. Calculate the stray and A/D sample capacitances using Equation 11-5.
Equation 11-5:
where I is known from the current source measurement step, t is a fixed delay and V is measured
by performing an A/D conversion.
This measured value is then stored and used for calculations of time measurement or subtracted
for capacitance measurement. For calibration, it is expected that the capacitance of
C
STRAY + CAD is approximately known. CAD is approximately 4 pF.
An iterative process may need to be used to adjust the time, t, that the circuit is charged to obtain
a reasonable voltage reading from the A/D Converter. The value of t may be determined by
setting C
OFFSET to a theoretical value, then solving for t. For example, if CSTRAY is theoretically
calculated to be 11 pF, and V is expected to be 70% of V
DD, or 2.31V, t would be equal to
Equation 11-6 or 63 s.
Equation 11-6: :
A typical routine for CTMU capacitance calibration is shown in Example 11-5.
C
OFFSET
C
STRAY
C
AD
I t
V
-------------=+=
4 pF 11 pF+
2.31V
0.55A
------------------

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