Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2011-2012 Microchip Technology Inc. Preliminary DS39997C-page 39
TABLE 4-5: INTERRUPT CONTROLLER REGISTER MAP
SFR
Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3
INTCON1 0080 NSTDIS
MATHERR ADDRERR ST
INTCON2 0082 ALTIVT DISI
IFS0 0084
AD1IF U1TXIF U1RXIF SPI1IF SPI1EIF T3IF T2IF OC2IF IC2IF T1IF
IFS1 0086
INT2IF T5IF
(1)
T4IF
(1)
INT1IF CNIF
IFS2 0088
IC3IF
IFS3 008A FLTA1IF RTCIF
PWM1IF
IFS4 008C
CTMUIF
IEC0 0094
AD1IE U1TXIE U1RXIE SPI1IE SPI1EIE T3IE T2IE OC2IE IC2IE T1IE
IEC1 0096
INT2IE T5IE
(1)
T4IE
(1)
INT1IE CNIE
IEC2 0098
IC3IE
IEC3 009A FLTA1IE RTCIE
PWM1IE
IEC4 009C
CTMUIE
IPC0 00A4
T1IP<2:0> OC1IP<2:0> IC1IP<2:0>
IPC1 00A6
T2IP<2:0> OC2IP<2:0> IC2IP<2:0>
IPC2 00A8
U1RXIP<2:0> SPI1IP<2:0> SPI1EIP<2:0>
IPC3 00AA
AD1IP<2:0>
IPC4 00AC
CNIP<2:0> CMIP<2:0> MI2C1IP<2:0>
IPC5 00AE
IPC6 00B0
T4IP<2:0>
(1)
IPC7 00B2
INT2IP<2:0>
IPC9 00B6
IC3IP<2:0>
IPC14 00C0
PWM1IP<2:0>
IPC15 00C2
FLTA1IP<2:0> RTCIP<2:0>
IPC16 00C4
U1EIP<2:0> F
IPC19 00CA
CTMUIP<2:0>
INTTREG 00E0
ILR<3:0> VECNUM<6:0>
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: This bit is available in PIC24FJ32MC101/102/104 devices only.
2: This bit is available in PIC24FJ32MC102/104 devices only.

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