Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2005-2011 Microchip Technology Inc. DS70157F-page 391
Section 5. Instruction Descriptions
Instruction
Descriptions
5
SAC.R
Store Rounded Accumulator
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X
Syntax: {label:} SAC.R Acc, {#Slit4,} Wd
[Wd]
[Wd++]
[Wd--]
[--Wd]
[++Wd]
[Wd + Wb]
Operands: Acc [A,B]
Slit4 [-8 ... +7]
Wb [W0 ... W15]
Wd [W0 ... W15]
Operation: Shift
Slit4
(Acc) (optional)
Round(Acc)
(Acc[31:16]) Wd
Status Affected: None
Encoding: 1100 1101 Awww wrrr rhhh dddd
Description: Perform an optional, signed 4-bit shift of the specified accumulator, then
store the rounded contents of ACCxH (Acc[31:16]) to Wd. The shift
range is -8:7, where a negative operand indicates an arithmetic left shift
and a positive operand indicates an arithmetic right shift. The Rounding
mode (Conventional or Convergent) is set by the RND bit,
CORCON<1>. Either register direct or indirect addressing may be used
for Wd.
The ‘A’ bit specifies the source accumulator.
The ‘w’ bits specify the offset register Wb.
The ‘r’ bits encode the optional accumulator pre-shift.
The ‘h’ bits select the destination Address mode.
The ‘d’ bits specify the destination register Wd.
Note 1: This instruction does not modify the contents of the Acc.
2: This instruction stores the rounded contents of Acc. The
instruction SAC may be used to store the truncated
accumulator contents.
3: If Data Write saturation is enabled (SATDW, CORCON<5>,
= 1), the value stored to Wd is subject to saturation after the
optional shift is performed.
Words: 1
Cycles: 1

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