Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
© 2010 Microchip Technology Inc. Preliminary DS39737A-page 49-11
Section 49. 10-Bit ADC with 4 Simultaneous Conversions
10-Bit ADC with
4 Simultaneous
Conversions
49
49.3 OVERVIEW OF SAMPLE AND CONVERSION SEQUENCE
Figure 49-2 illustrates that the A/D conversion is a three-step process:
1. The input voltage signal is connected to the sample capacitor.
2. The sample capacitor is disconnected from the input.
3. The stored voltage is converted to equivalent digital bits.
The two distinct phases, sample and conversion, are independently controlled.
Figure 49-2: Sample Conversion Sequence
49.3.1 Sample Time
Sample time is when the selected analog input is connected to the sample capacitor. There is a
minimum sample time to ensure that the S&H amplifier provides a desired accuracy for the A/D
conversion (see Section 49.10 “A/D Sampling Requirements”).
The sampling phase can be set up to start automatically upon conversion or by manually setting
the Sample bit (SAMP) in the ADC Control Register 1 (ADxCON1<1>). The sampling phase is
controlled by the Auto-Sample bit (ASAM) in the ADC Control Register 1 (ADxCON1<2>).
Table 49-1 lists the options selected by the specific bit configuration.
Table 49-1: Start of Sampling Selection
If automatic sampling is enabled, the Sampling Time (TSMP) taken by the ADC module is equal
to the number of T
AD cycles defined by the SAMC<4:0> bits (ADxCON3<12:8>), as shown by
Equation 49-1.
Equation 49-1: Sampling Time Calculation
If manual sampling is desired, the user software must provide sufficient time to ensure adequate
sampling time.
+
-
+
-
SAR
ADC
Sample Time Conversion Time
SOC
Trigger
Note: The ADC module requires a finite number of A/D clock cycles to start conversion
after receiving a conversion trigger or stopping the sampling process. Refer to the
TPCS parameter in the “Electrical Characteristics” chapter of the specific device
data sheet for further details.
ASAM Start of Sampling Selection
0 Manual sampling
1 Automatic sampling
TSMP = SAMC<4:0> • TAD
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-Section49-10-Bit_ADC_with_4_Simultaneous_Conversions.pdf