Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2005-2011 Microchip Technology Inc. DS70157F-page 239
Section 5. Instruction Descriptions
Instruction
Descriptions
5
ED
Euclidean Distance (No Accumulate)
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X
Syntax: {label:} ED Wm * Wm, Acc, [Wx], [Wy], Wxd
[Wx] + = kx, [Wy] + = ky,
[Wx] – = kx, [Wy] – = ky,
[W9 +
W12],
[W11 +
W12],
Operands: Acc [A,B]
Wm * Wm [W4 * W4, W5 * W5, W6 * W6, W7 * W7]
Wx [W8, W9]; kx [-6, -4, -2, 2, 4, 6]
Wy [W10, W11]; ky [-6, -4, -2, 2, 4, 6]
Wxd [W4 ... W7]
Operation: (Wm) * (Wm) Acc(A or B)
([Wx] – [Wy]) Wxd
(Wx) + kx Wx
(Wy) + ky Wy
Status Affected: OA, OB, OAB, SA, SB, SAB
Encoding:
1111 00mm A1xx 00ii iijj
jj11
Description: Compute the square of Wm, and compute the difference of the prefetch
values specified by [Wx] and [Wy]. The results of Wm * Wm are
sign-extended to 40 bits and stored in the specified accumulator. The
results of [Wx] – [Wy] are stored in Wxd, which may be the same as Wm.
Operands Wx, Wxd and Wyd specify the prefetch operations which
support indirect and register offset addressing as described in
Section 4.14.1 “MAC Prefetches”.
The ‘m’ bits select the operand register Wm for the square.
The ‘A’ bit selects the accumulator for the result.
The ‘x’ bits select the prefetch difference Wxd destination.
The ‘i’ bits select the Wx prefetch operation.
The ‘j’ bits select the Wy prefetch operation.
Words: 1
Cycles: 1
Example 1:
ED W4*W4, A, [W8]+=2, [W10]-=2, W4 ; Square W4 to ACCA
; [W8]-[W10] to W4
; Post-increment W8
; Post-decrement W10
Before
Instruction
After
Instruction
W4 009A W4 0057
W8 1100 W8 1102
W10 2300 W10 22FE
ACCA 00 3D0A 0000 ACCA 00 0000 5CA4
Data 1100 007F Data 1100 007F
Data 2300 0028 Data 2300 0028
SR 0000 SR 0000

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