Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
© 2005-2011 Microchip Technology Inc. DS70157F-page 357
Section 5. Instruction Descriptions
Instruction
Descriptions
5
REPEAT
Repeat Next Instruction ‘lit15 + 1’ Times
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X
Syntax: {label:} REPEAT #lit15
Operands: lit15 ∈ [0 ... 32767]
Operation: (lit15) → RCOUNT
(PC) + 2 → PC
Enable Code Looping
Status Affected: RA
Encoding: 0000 1001 0kkk kkkk kkkk kkkk
Description: Repeat the instruction immediately following the REPEAT instruction
(lit15 + 1) times. The repeated instruction (or target instruction) is held in
the instruction register for all iterations and is only fetched once.
When this instruction executes, the RCOUNT register is loaded with the
repeat count value specified in the instruction. RCOUNT is decremented
with each execution of the target instruction. When RCOUNT equals
zero, the target instruction is executed one more time, and then normal
instruction execution continues with the instruction following the target
instruction.
The ‘k’ bits are an unsigned literal that specifies the loop count.
Special Features, Restrictions:
1. When the repeat literal is ‘0’, REPEAT has the effect of a NOP and
the RA bit is not set.
2. The target REPEAT instruction cannot be:
• an instruction that changes program flow
• a DISI, LNK, MOV.D, PWRSAV, REPEAT or UNLK
instruction
• a 2-word instruction
Unexpected results may occur if these target instructions are used.
Note: The REPEAT and target instruction are interruptible.
Words: 1
Cycles: 1
Example 1:
000452 REPEAT #9 ; Execute ADD 10 times
000454 ADD [W0++], W1, [W2++] ; Vector update
Before
Instruction
After
Instruction
PC 00 0452 PC 00 0454
RCOUNT 0000 RCOUNT 0009
SR 0000 SR 0010 (RA = 1)
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ64GA004-Programmers_Reference_Manual.pdf