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© 2010 Microchip Technology Inc. DS39724B-page 11-31
Section 11. CTMU
CTMU
11
11.15 REVISION HISTORY
Revision A (March 2008)
This is the initial released revision of this document.
Revision B (May 2010)
This revision includes the following updates:
Updated the CTMU Block Diagram (Figure 11-1) to include the new registers, CTMUCON1
and CTMUCON2, and added Note 1
Updated the introductory paragraphs in Section 11.2 Registers to include references to
the new registers
Added the CTMU Control Register 1 (Register 11-2) and the CTMU Control Register 2
(Register 11-3)
Updated the bit setting definition for IRNG<1:0> = 00 in the CTMU Current Control Register
(Register 11-4)
Updated the charge equation (Equation 11-1) in Section 11.3.1 Theory of Operation
Updated the CTMU Current Source Calibration Circuit (see Figure 11-2)
Updated existing examples and added new examples for the CTMUCON1 and
CTMUCON2 registers. Example titles have been updated to reflect the register or registers
to which the code is applicable. See Example 11-1 through Example 11-8.
Updated the Typical Connections and Internal Configuration for Pulse Delay Generation
(Example 11-3) and added Note 1
Added the new section Section 11.9 Measuring On-Chip Temperature with the CTMU
Added the new registers, CTMUCON1 and CTMUCON2, to the register map and added
Note 1 (see Table 11-1)
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ32MC10X-Reference_Manual-Section11-Charge_Time_Measurement_Unit.pdf