Vault 7: Projects

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© 2005-2011 Microchip Technology Inc. DS70157F-page 157
Section 5. Instruction Descriptions
Instruction
Descriptions
5
BTG
Bit Toggle f
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} BTG{.B} f, #bit4
Operands: f [0 ... 8191] for byte operation
f [0 ... 8190] (even only) for word operation
bit4 [0 ... 7] for byte operation
bit4 [0 ... 15] for word operation
Operation: (f)<
bit4> (f)<bit4>
Status Affected: None
Encoding: 1010 1010 bbbf ffff ffff fffb
Description: Bit ‘bit4’ in file register ‘f’ is toggled (complemented). For the bit4
operand, bit numbering begins with the Least Significant bit (bit 0) and
advances to the Most Significant bit (bit 7 for byte operation, bit 15 for
word operation) of the byte.
The ‘b’ bits select value bit4, the bit position to toggle.
The ‘f’ bits select the address of the file register.
Note 1: The extension .B in the instruction denotes a byte operation
rather than a word operation. You may use a .W extension to
denote a word operation, but it is not required.
2: When this instruction operates in Word mode, the file register
address must be word-aligned.
3: When this instruction operates in Byte mode, ‘bit4’ must be
between 0 and 7.
Words: 1
Cycles:
1
(1)
Note 1:
In dsPIC33E and PIC24E devices, the listed cycle count does not apply to read and
read-modify-write operations on non-CPU Special Function Registers. For more
details, see
Note 3
in
Section 3.2.1 “Multi-Cycle Instructions”
.
Example 1:
BTG.B 0x1001, #0x4 ; Toggle bit 4 in 0x1001
Before
Instruction
After
Instruction
Data 1000 F234 Data 1000 E234
SR 0000 SR 0000
Example 2:
BTG 0x1660, #0x8 ; Toggle bit 8 in RAM660
Before
Instruction
After
Instruction
Data 1660 5606 Data 1660 5706
SR 0000 SR 0000

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