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© 2005-2011 Microchip Technology Inc. DS70157F-page 431
Section 5. Instruction Descriptions
Instruction
Descriptions
5
TBLWTH Table Write High
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X X X X
Syntax: {label:} TBLWTH{.B} Ws, [Wd]
[Ws], [Wd++]
[Ws++], [Wd--]
[Ws--], [++Wd]
[++Ws], [--Wd]
[--Ws],
Operands: Ws ∈ [W0 ... W15]
Wd ∈ [W0 ... W15]
Operation: For byte operation:
If (LSB(Wd) = 1)
NOP
Else
(Ws) → Program Mem [(TBLPAG),(Wd)]<23:16>
For word operation:
(Ws)<7:0> → Program Mem [(TBLPAG),(Wd)] <23:16>
Status Affected: None
Encoding: 1011 1011 1Bqq qddd dppp ssss
Description: Store the contents of the working source register Ws to the most significant
word of program memory. The destination word address of program
memory is formed by concatenating the 8-bit Table Pointer register,
TBLPAG<7:0>, with the effective address specified by Wd. Either direct or
indirect addressing may be used for Ws, and indirect addressing must be
used for Wd.
Since program memory is 24 bits wide, this instruction can only write to the
upper byte of program memory (PM<23:16>). This may be performed using
a Wd that is word-aligned in Byte mode or Word mode. If Byte mode is
used with a Wd that is not word-aligned, no operation is performed.
The ‘B’ bit selects byte or word operation (‘0’ for word, ‘1’ for byte).
The ‘q’ bits select the destination Address mode.
The ‘d’ bits select the destination register.
The ‘p’ bits select the source Address mode.
The ‘s’ bits select the source register.
Note: The extension .B in the instruction denotes a byte move rather
than a word move. You may use a .W extension to denote a word
move, but it is not required.
Words: 1
Cycles:
2
(1)
Note 1:
In dsPIC33E and PIC24E devices, the listed cycle count does not apply to read and
read-modify-write operations on non-CPU Special Function Registers. For more
details, see
Note 3
in
Section 3.2.1 “Multi-Cycle Instructions”
.
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ64GA004-Programmers_Reference_Manual.pdf