Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2010 Microchip Technology Inc. Preliminary DS39735A-page 47-25
Section 47. Motor Control PWM
Motor Control
PWM
47
47.9 PWM OUTPUT MODES
This section describes the PWM output modes.
47.9.1 Single Event PWM Operation
The PWM module produces single pulse outputs when the PWM time base is configured for the
Single Event mode (PTMOD<1:0> = 01). This mode of operation is useful for driving certain
types of electronically commutated motors, such as high-speed switched reluctance motor
operation. Only edge-aligned outputs can be produced in Single Event mode.
In Single Event mode, the PWM I/O pin(s) are driven to the active state when the PTEN
(PxTCON<15>) bit is set. When a match with a duty cycle register occurs, the PWM I/O pin is
driven to the inactive state. When a match with the PxTPER register occurs, the PxTMR register
is cleared, all active PWM I/O pins are driven to the inactive state, the PTEN bit is cleared and
an interrupt is generated. Operation of the PWM module stops until the PTEN bit is set again in
software.
Figure 47-5: Single Event PWM Operation
47.9.2 Edge-Aligned PWM
The PWM module produces edge-aligned PWM signals when the PWM time base is operating
in Free-Running mode. The output signal for a given PWM channel has a period specified by
the value loaded in PxTPER and a duty cycle specified by the appropriate PxDC3:PxDC1
register (see Figure 47-6). Assuming a non-zero duty cycle and no immediate updates enabled
(IUE = 0), the outputs of all enabled PWM generators will be driven active at the beginning of
the PWM period (PxTMR = 0). Each PWM output will be driven inactive when the value of
PxTMR matches the duty cycle value of the PWM generator.
If the value in the PxDC3:PxDC1 register is zero, the output on the corresponding PWM pin is
inactive for the entire PWM period. In addition, the output on the PWM pin is active for the entire
PWM period if the value in the PxDC3:PxDC1 register is greater than the value held in the
PxTPER register.
If immediate updates are enabled (IUE = 1), the new duty cycle value will be loaded when the
new value is written to any active PxDC3:PxDC1 register.
PxDC1
PxTPER
PTEN Bit Set by
Software
PTEN Bit Cleared by
Hardware
PWMxIF
PWMxIF Cleared in Software
PxDC2
PWMxH2
PWMxH1
PTEN

e-Highlighter

Click to send permalink to address bar, or right-click to copy permalink.

Un-highlight all Un-highlight selectionu Highlight selectionh