Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2006 Microchip Technology Inc. Advance Information DS39716A-page 33-5
Section 33. Programming and Diagnostics
Programm
i
ng
and Diagnostics
33
In PIC24F family devices, the hardware for the JTAG boundary scan is implemented as a peripheral
module (i.e., outside of the CPU core) with additional integrated logic in all I/O ports. A logical block
diagram of the JTAG module is shown in Figure 33-2. It consists of the following key elements:
TAP Interface Pins (TDI, TMS, TCK and TDO)
TAP Controller
Instruction Shift register and Instruction Register (IR)
Data Registers
Figure 33-2: JTAG Logical Block Diagram
33.4.1 Test Access Port (TAP) and TAP Controller
The Test Access Port (TAP) on the PIC24F device family is a general purpose port that provides
test access to many built-in support functions and test logic defined in IEEE Standard 1149.1.
The TAP is disabled by programming the JTAGEN bit in Configuration Word 1 (the TAP, by
default, is enabled in the bit’s unprogrammed state). While enabled, the designated I/O pins
become dedicated TAP pins. See the appropriate PIC24F device data sheet for details about
disabling/enabling the JTAG module and identifying JTAG control pins.
The PIC24F family implements a 4-pin JTAG interface with these pins:
TCK (Test Clock Input): Provides the clock for test logic.
TMS (Test Mode Select Input): Used by the TAP to control test operations.
TDI (Test Data Input): Serial input for test instructions and data.
TDO (Test Data Output): Serial output for test instructions and data.
To minimize I/O loss due to JTAG, the optional TAP Reset (TRST
) input pin, specified in the
standard, is not implemented on PIC24F devices. For convenience, a “soft” TAP Reset has been
included in the TAP controller, using the TMS and TCK pins. To force a port Reset, apply a logic
high to the TMS pin for at least 5 rising edges of TCK. Note that device Resets (including POR)
do not automatically result in a TAP Reset; this must be done by the external JTAG controller
using the soft TAP Reset.
TMS
Capture-IR
TAP
TCK
TDI
Controller
Shift-IR
Update-IR
Capture-DR
Shift-DR
Update-DR
Instruction Shift Register
Instruction Register
Instruction Decode
Data Registers
MCHP Command
Register
MCHP Command Shift Register
Boundary Scan Cell Registers
Device ID Register
Bypass Register
MCHP Scan Data
Data Selector
(MUX)
TDO
TDO Selector
(MUX)
Output Data
Sampling
Register

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