Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

© 2005-2011 Microchip Technology Inc. DS70157F-page 353
Section 5. Instruction Descriptions
Instruction
Descriptions
5
RCALL
Computed Relative Call
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X
Syntax: {label:} RCALL Wn
Operands: Wn [W0 ... W15]
Operation: (PC) + 2 PC
(PC<15:1>) TOS<15:1>, SFA bit TOS<0>
(W15) + 2 W15
(PC<22:16>) (TOS)
(W15) + 2 W15
0 SFA bit
(PC) + (2 * (Wn)) PC
NOP Instruction Register
Status Affected: SFA
Encoding: 0000 0001 0000 0010 0000 ssss
Description: Computed, relative subroutine call specified by the working register Wn. The
range of the call is 32K program words forward or back from the current PC.
Before the call is made, the return address (PC + 2) is PUSHed onto the
stack. After the return address is stacked, the sign-extended 17-bit value (2 *
(Wn)) is added to the contents of the PC and the result is stored in the PC.
Register direct addressing must be used for Wn.
The ‘s’ bits select the source register.
Words: 1
Cycles: 4
Example 1:
00FF8C EX1: INC W2, W3
00FF8E ...
. ...
. ...
010008
01000A RCALL W6
01000C MOVE W4, [W10]
; Destination of RCALL
; RCALL with W6
Before
Instruction
After
Instruction
PC 01 000A PC 00 FF8C
W6 FFC0 W6 FFC0
W15 1004 W15 1008
Data 1004 98FF Data 1004 000C
Data 1006 2310 Data 1006 0001
SR 0000 SR 0000

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