Vault 7: Projects

This publication series is about specific projects related to the Vault 7 main publication.

PIC24F Family Reference Manual
DS39719D-page 32-4 © 2010 Microchip Technology Inc.
32.2.1 PIC24F J-Series Flash Devices
For PIC24F devices with J-series Flash memory, the Configuration bits are implemented as vol-
atile memory; that is, the configuration data must be loaded each time the device is powered up.
The actual configuration data is stored in the last several words at the end of the on-chip program
memory space, known as the Flash Configuration Words (abbreviated as CW). During all types
of device Resets, the configuration data is automatically loaded from the Flash Configuration
Words to the proper Configuration registers.
The CWs are 16-bit, packed representations of the actual device Configuration bits; the actual
locations of which are distributed among several locations in configuration space. The number
of CWs implemented for a particular device family depends on the devices feature set and
configuration options; there are always at least two and occasionally as many as four. They are
numbered sequentially, starting from the last address in program memory and working towards
lower addresses. Table 32-2 provides the CW address for common program memory sizes.
Refer to the device data sheet for part-specific implementation.
The Configuration bits can be programmed (read as 0), or left unprogrammed (read as 1), to
select various configuration options. To prevent inadvertent configuration changes during code
execution, all programmable device Configuration bits are write-once. After a bit is initially written
during a power cycle or any Reset, it cannot be written to again. Any change of a Configuration
bit (not a change to a Flash Configuration Word) causes a Configuration Mismatch (CM) Reset,
which then forces a reload of the original values.
Table 32-2: Flash Configuration Word Addresses for Typical Program Memory Sizes
32.2.1.1 CONSIDERATIONS WHEN USING FLASH CONFIGURATION WORDS
When creating applications for J-series Flash devices, always specifically allocate the location of
the Flash Configuration Word for configuration data. This is to ensure that the program code is
not stored in this address when the code is compiled.
The upper byte of all the Flash Configuration Words in the program memory should always be
1111 1111. This makes them appear to be NOP instructions in the remote event that their
locations are ever executed by accident. Since the Configuration bits are not implemented in
the corresponding locations, writing 1 to these locations has no effect on device operation.
As mentioned before, changes to the actual device Configuration bits during run time would
cause a Configuration Mismatch Reset. This does not prevent changes to Flash Configuration
Words during normal operation. This also makes it possible for an application to change its
hardware configuration by writing new data to these Flash Configuration Words, and then
executing a RESET command, which results in reloading the new values.
Memory Size Configuration Word Addresses
Kbytes K words CW1 CW2 CW3
(1)
16 5.5 002BFEh 002BFCh 002BFAh
32 11 0057FEh 0057FCh 0057FAh
64 22 00ABFEh 00ABFCh 00ABFAh
128 44 0157FEh 0157FCh 0157FAh
256 87.5 02ABFEh 02ABFCh 02ABFAh
Note 1: Only implemented in some device families. CW4, if implemented, is located at the
address ([CW3]-2).

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