Vault 7: Projects
This publication series is about specific projects related to the Vault 7 main publication.
© 2005-2011 Microchip Technology Inc. DS70157F-page 147
Section 5. Instruction Descriptions
Instruction
Descriptions
5
BRA OB
Branch if Overflow Accumulator B
Implemented in: PIC24F PIC24H PIC24E dsPIC30F dsPIC33F dsPIC33E
X X X
Syntax: {label:} BRA OB, Expr
Operands: Expr may be a label, absolute address or expression.
Expr is resolved by the linker to a Slit16, where
Slit16 ∈ [-32768 ... +32767].
Operation: Condition = OB
If (Condition)
(PC + 2) + 2 * Slit16 → PC
NOP → Instruction Register
Status Affected: None
Encoding: 0000 1101 nnnn nnnn nnnn nnnn
Description: If the Overflow Accumulator B flag is ‘1’, then the program will branch
relative to the next PC. The offset of the branch is the two’s complement
number ‘2 * Slit16’, which supports branches up to 32K instructions
forward or backward. The Slit16 value is resolved by the linker from the
supplied label, absolute address or expression.
If the branch is taken, the new address will be (PC + 2) + 2 * Slit16, since
the PC will have incremented to fetch the next instruction. The instruction
then becomes a two-cycle instruction, with a NOP executed in the second
cycle.
The ‘n’ bits are a signed literal that specifies the number of instructions
offset from (PC + 2).
Words: 1
Cycles: 1 (2 if branch taken) – dsPIC30F, dsPIC33F
1 (4 if branch taken) – dsPIC33E
Example 1:
002000 HERE: BRA OB, BYPASS
002002 NO_OB: . . .
002004 . . .
002006 . . .
002008 . . .
00200A GOTO THERE
00200C BYPASS: . . .
00200E . . .
; If OB, branch to BYPASS
; Otherwise... continue
Before
Instruction
After
Instruction
PC 00 2000 PC 00 2002
SR 8800 (OA, OAB = 1) SR 8800 (OA, OAB = 1)
Protego_Release_01_05-Related-OEM-Documentation-PIC24FJ64GA004-Programmers_Reference_Manual.pdf