Vault 7: Projects
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MPLAB
®
XC16 C Compiler Users Guide
DS50002071C-page 196 2012-2013 Microchip Technology Inc.
The irq/altirq number can be one of the interrupt request numbers 45 to 53. If the
irq parameter of the interrupt attribute is used, the compiler creates the external
symbol name __Interruptn, where n is the vector number. Therefore, the C
identifiers _Interrupt45 through _Interrupt53 are reserved by the compiler. In
the same way, if the altirq parameter of the interrupt attribute is used, the compiler
creates the external symbol name __AltInterruptn, where n is the vector number.
Therefore, the C identifiers _AltInterrupt45 through _AltInterrupt53 are
reserved by the compiler.
For tables of interrupt vectors by device family:
In MPLAB X IDE, for newer versions of the compiler, open the Dashboard window
and click on the Compiler Help button.
On the command-line, see the docs subdirectory of the MPLAB XC16 C compiler
install directory (Section 3.2 MPLAB X IDE and Tools Installation). Open the
XC16MasterIndex file and click on the Interrupt Vector Tables Reference link.
14.5 INTERRUPT SERVICE ROUTINE CONTEXT SAVING
Interrupts, by their very nature, can occur at unpredictable times. Therefore, the
interrupted code must be able to resume with the same machine state that was present
when the interrupt occurred.
To properly handle a return from interrupt, the setup (prologue) code for an ISR function
automatically saves the compiler-managed working and special function registers on
the stack for later restoration at the end of the ISR. You can use the optional save
parameter of the interrupt attribute to specify additional variables and SFRs to be
saved and restored.
In certain applications, it may be necessary to insert assembly statements into the ISR
immediately prior to the compiler-generated function prologue. For example, it may be
required that a semaphore be incremented immediately on entry to an interrupt service
routine. This can be done as follows:
void __attribute__((__interrupt__,__auto_psv__(__preprologue__
("inc _semaphore")))) isr0(void);
The context switch leads to latency in interrupt code execution, as described in
Section 14.8.3 Latency.
14.6 NESTING INTERRUPTS
The 16-bit devices support nested interrupts. Since processor resources are saved on
the stack in an ISR, nested ISRs are coded in just the same way as non-nested ones.
Nested interrupts are enabled by clearing the NSTDIS (nested interrupt disable) bit in
the INTCON1 register. Note that this is the default condition as the 16-bit device comes
out of Reset with nested interrupts enabled. Each interrupt source is assigned a priority
in the Interrupt Priority Control registers (IPCn).
An interrupt is vectored if the priority of the interrupt source is greater than the current
CPU priority level.
Protego_Release_01_05-Related-OEM-Documentation-MPLAB-XC16-C-Compiler.pdf